參數(shù)資料
型號(hào): MPC8280VVUPEA
廠商: Freescale Semiconductor
文件頁(yè)數(shù): 18/83頁(yè)
文件大小: 0K
描述: IC MPU POWERQUICC II 480-TBGA
標(biāo)準(zhǔn)包裝: 21
系列: MPC82xx
處理器類(lèi)型: 32-位 MPC82xx PowerQUICC II
速度: 450MHz
電壓: 1.5V
安裝類(lèi)型: 表面貼裝
封裝/外殼: 480-LBGA
供應(yīng)商設(shè)備封裝: 408-TBGA(37.5x37.5)
包裝: 托盤(pán)
MPC8280 PowerQUICC II Family Hardware Specifications, Rev. 2
Freescale Semiconductor
25
AC Electrical Characteristics
This table is a representation of the information in Table 15.
Figure 12. Internal Tick Spacing for Memory Controller Signals
NOTE
The UPM machine outputs change on the internal tick determined by the
memory controller programming; the AC specifications are relative to the
internal tick. Note that SDRAM and GPCM machine outputs change on
CLKin’s rising edge.
6.3
JTAG Timings
This table lists the JTAG timings.
Table 15. Tick Spacing for Memory Controller Signals
PLL Clock Ratio
Tick Spacing (T1 Occurs at the Rising Edge of CLKin)
T2
T3
T4
1:2, 1:3, 1:4, 1:5, 1:6
1/4 CLKin
1/2 CLKin
3/4 CLKin
1:2.5
3/10 CLKin
1/2 CLKin
8/10 CLKin
1:3.5
4/14 CLKin
1/2 CLKin
11/14 CLKin
Table 16. JTAG Timings1
Parameter
Symbol2
Min
Max
Unit
Notes
JTAG external clock frequency of operation
fJTG
033.3
MHz
JTAG external clock cycle time
tJTG
30
ns
JTAG external clock pulse width measured at 1.4V
tJTKHKL
15
ns
JTAG external clock rise and fall times
tJTGR and
tJTGF
05
ns
6
TRST assert time
tTRST
25
ns
3, 6
Input setup times
Boundary-scan data
TMS, TDI
tJTDVKH
tJTIVKH
4
ns
4, 7
CLKin
T1
T2
T3
T4
CLKin
T1
T2
T3
T4
for 1:2.5
for 1:3.5
CLKin
T1
T2
T3
T4
for 1:2, 1:3, 1:4, 1:5, 1:6
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