參數(shù)資料
型號: MPC8308VMAGDA
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: RISC MICROCONTROLLER, PBGA473
封裝: 19 X 19 MM, 1.39 MM HEIGHT, 0.80 MM PITCH, LEAD FREE, PLASTIC, MABGA-473
文件頁數(shù): 17/90頁
文件大小: 1123K
代理商: MPC8308VMAGDA
MPC8308 PowerQUICC II Pro Processor Hardware Specification, Rev. 2
24
Freescale Semiconductor
USB
9.1.2
USB AC Electrical Specifications
Table 31 lists the general timing parameters of the USB-ULPI interface.
Figure 13 and Figure 14 provide the AC test load and signals for the USB, respectively.
Figure 13. USB AC Test Load
Figure 14. USB Signals
Table 31. USB General Timing Parameters
Parameter
Symbol 1
Min
Max
Unit
Notes
USB clock cycle time
tUSCK
15
ns
1, 2
Input setup to USB clock—all inputs
tUSIVKH
4—
ns
1, 4
Input hold to USB clock—all inputs
tUSIXKH
1—
ns
1, 4
USB clock to output valid—all outputs
tUSKHOV
—9
ns
1
Output hold from USB clock—all outputs
tUSKHOX
1—
ns
1
Notes:
1. The symbols used for timing specifications follow the pattern of t(First two letters of functional block)(signal)(state)(reference)(state) for
inputs and t(First two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tUSIXKH symbolizes usb timing
(US) for the input (I) to go invalid (X) with respect to the time the usb clock reference (K) goes high (H). Also, tUSKHOX
symbolizes usb timing (US) for the usb clock reference (K) to go high (H), with respect to the output (O) going invalid (X) or
output hold time.
2. All timings are in reference to USB clock.
3. All signals are measured from NVDD/2 of the rising edge of USB clock to 0.4
× NVDD of the signal in question for 3.3-V
signaling levels.
4. Input timings are measured at the pin.
5. For purposes of active/float timing measurements, the Hi-Z or off-state is defined to be when the total current delivered
through the component pin is less than or equal to the leakage current specification.
Output
Z0 = 50
Ω
NVDD/2
RL = 50
Ω
Output Signals
tUSKHOV
USBDR_CLK
Input Signals
tUSIXKH
tUSIVKH
tUSKHOX
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