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參數(shù)資料
| 型號： | MPC8313CVRAFF |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 333 MHz, MICROPROCESSOR, PBGA516 |
| 封裝： | 27 X 27 MM, 2.25 MM HEIGHT, 1 MM PITCH, LEAD FREE, TEPBGAII-516 |
| 文件頁數(shù)： | 93/100頁 |
| 文件大?。?/td> | 1247K |
| 代理商： | MPC8313CVRAFF |
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MPC8313E PowerQUICC II Pro Processor Hardware Specifications, Rev. 3
92
Freescale Semiconductor
System Design Information
22.8
Pull-Up Resistor Requirements
The MPC8313E requires high resistance pull-up resistors (10 k
Ω is recommended) on open drain type pins
including I2C, Ethernet management MDIO, and IPIC (integrated programmable interrupt controller).
Correct operation of the JTAG interface requires configuration of a group of system control pins as
demonstrated in Figure 61. Care must be taken to ensure that these pins are maintained at a valid deasserted
state under normal operating conditions because most have asynchronous behavior and spurious assertion,
which give unpredictable results.
Refer to the PCI 2.2 Specification, for all pull-ups required for PCI.
22.9
JTAG Configuration Signals
Boundary scan testing is enabled through the JTAG interface signals. The TRST signal is optional in
IEEE 1149.1, but is provided on any Freescale devices that are built on Power Architecture technology.
The device requires TRST to be asserted during reset conditions to ensure the JTAG boundary logic does
not interfere with normal chip operation. While it is possible to force the TAP controller to the reset state
using only the TCK and TMS signals, systems generally assert TRST during power-on reset. Because the
JTAG interface is also used for accessing the common on-chip processor (COP) function, simply tying
TRST to PORESET is not practical.
The COP function of these processors allows a remote computer system (typically, a PC with dedicated
hardware and debugging software) to access and control the internal operations of the processor. The COP
interface connects primarily through the JTAG port of the processor, with some additional status
monitoring signals. The COP port requires the ability to independently assert TRST without causing
PORESET. If the target system has independent reset sources, such as voltage monitors, watchdog timers,
power supply failures, or push-button switches, then the COP reset signals must be merged into these
signals with logic.
The arrangement shown in Figure 61 allows the COP to independently assert HRESET or TRST, while
ensuring that the target can drive HRESET as well. If the JTAG interface and COP header are not used,
TRST should be tied to PORESET so that it is asserted when the system reset signal (PORESET) is
asserted.
The COP header shown in Figure 61 adds many benefits—breakpoints, watchpoints, register and memory
examination/modification, and other standard debugger features are possible through this interface—and
can be as inexpensive as an unpopulated footprint for a header to be added when needed.
The COP interface has a standard header for connection to the target system, based on the 0.025"
square-post, 0.100" centered header assembly (often called a Berg header).
There is no standardized way to number the COP header shown in Figure 61; consequently, many different
pin numbers have been observed from emulator vendors. Some are numbered top-to-bottom then
left-to-right, while others use left-to-right then top-to-bottom, while still others number the pins counter
clockwise from pin 1 (as with an IC). Regardless of the numbering, the signal placement recommended in
Figure 61 is common to all known emulators.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MPC8313CVRAFFA | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications |
| MPC8313CVRAFFB | 功能描述:微處理器 - MPU PBGA W/O ENCR RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| MPC8313CVRAFFB | 制造商:Freescale Semiconductor 功能描述:IC 32-BIT MPU 333MHZ 516-PBGA |
| MPC8313CVRAFFC | 功能描述:微處理器 - MPU 8313 REV2.2 NO ENC EXT RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| MPC8313CVRAGDB | 功能描述:微處理器 - MPU PBGA W/O ENCR RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
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