參數(shù)資料
型號： MPC8313CVRAGDB
廠商： Freescale Semiconductor
文件頁數(shù)： 3/99頁
文件大?。?/td> 0K
描述： MPU POWERQUICC II PRO 516-PBGA
標(biāo)準(zhǔn)包裝： 40
系列： MPC83xx
處理器類型： 32-位 MPC83xx PowerQUICC II Pro
速度： 400MHz
電壓： 0.95 V ~ 1.05 V
安裝類型： 表面貼裝
封裝/外殼： 516-BBGA 裸露焊盤
供應(yīng)商設(shè)備封裝： 516-PBGAPGE（27x27）
包裝： 托盤
MPC8313E PowerQUICC II Pro Processor Hardware Specifications, Rev. 4
Freescale Semiconductor
11
3
Power Characteristics
The estimated typical power dissipation, not including I/O supply power, for this family of MPC8313E
devices is shown in this table. Table 5 shows the estimated typical I/O power dissipation.
This table describes a typical scenario where blocks with the stated percentage of utilization and
impedances consume the amount of power described.
1
Table 4. MPC8313E Power Dissipation1
Core Frequency
(MHz)
CSB Frequency
(MHz)
Typical2
Maximum for
Rev. 1.0 Silicon3
Maximum for
Rev. 2.x or Later Silicon3
Unit
333
167
820
1020
1200
mW
400
133
820
1020
1200
mW
Note:
1. The values do not include I/O supply power or AVDD, but do include core, USB PLL, and a portion of SerDes digital power
(not including XCOREVDD, XPADVDD, or SDAVDD, which all have dedicated power supplies for the SerDes PHY).
2. Typical power is based on a voltage of VDD = 1.05 V and an artificial smoker test running at room temperature.
3. Maximum power is based on a voltage of VDD = 1.05 V, a junction temperature of TJ = 105C, and an artificial smoker test.
Table 5. MPC8313E Typical I/O Power Dissipation
Interface
Parameter
GVDD
(1.8 V)
GVDD
(2.5 V)
NVDD
(3.3 V)
LVDDA/
LVDDB
(3.3 V)
LVDDA/
LVDDB
(2.5 V)
LVDD
(3.3 V)
Unit
Comments
DDR 1, 60% utilization,
50% read/write
Rs = 22
Rt = 50
single pair of clock
capacitive load: data = 8 pF,
control address = 8 pF,
clock = 8 pF
333 MHz,
32 bits
—
0.355
——
W
—
266 MHz,
32 bits
—
0.323
——
W
—
DDR 2, 60% utilization,
50% read/write
Rs = 22
Rt = 75
single pair of clock
capacitive load: data = 8 pF,
control address = 8 pF,
clock = 8 pF
333 MHz,
32 bits
0.266
—
——
W
—
266 MHz,
32 bits
0.246
—
——
W
—
PCI I/O load = 50 pF
33 MHz
—
0.120
—
W
—
66 MHz
—
0.249
—
W
—
Local bus I/O load = 20 pF
66 MHz
—
0.056
W
—
50 MHz
—
0.040
W
—
TSEC I/O load = 20 pF
MII,
25 MHz
—
0.008
—
W
Multiple by
number of
interface used
RGMII,
125 MHz
—
0.078
0.044
—
W
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