參數(shù)資料
型號(hào)： MPC8313CZQADD
廠商： Freescale Semiconductor
文件頁(yè)數(shù)： 81/99頁(yè)
文件大?。?/td> 0K
描述： IC MPU POWERQUICC II PRO 516PBGA
標(biāo)準(zhǔn)包裝： 40
系列： MPC83xx
處理器類(lèi)型： 32-位 MPC83xx PowerQUICC II Pro
速度： 267MHz
電壓： 0.95 V ~ 1.05 V
安裝類(lèi)型： 表面貼裝
封裝/外殼： 516-BBGA 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝： 516-PBGAPGE（27x27）
包裝： 托盤(pán)
配用： MPC8313E-RDB-ND - BOARD PROCESSOR
MPC8313E PowerQUICC II Pro Processor Hardware Specifications, Rev. 4
82
Freescale Semiconductor
20.3
Example Clock Frequency Combinations
This table shows several possible frequency combinations that can be selected based on the indicated input
reference frequencies, with RCWLR[LBCM] = 0 and RCWLR[DDRCM] =1, such that the LBC operates
with a frequency equal to the frequency of csb_clk and the DDR controller operates at twice the frequency
of csb_clk.
21 Thermal
This section describes the thermal specifications of the MPC8313E.
21.1
Thermal Characteristics
This table provides the package thermal characteristics for the 516, 27
27 mm TEPBGAII.
Table 68. System Clock Frequencies
LBC(lbc_clk)
e300 Core(core_clk)
SYS_
CLK_IN/
PCI_CLK
SPMF1 VCOD2 VCO3
CSB
(csb_clk)4
DDR
(ddr_clk)
/2
/4
/8
USB
ref5
1
1.5 2 2.5 3
25.0
6
2
600.0
150.0
300.0
—
37.5
18.8
Note6
150.0
225
300
375
—
25.0
5
2
500.0
125.0
250.0
62.5 31.25 15.6
Note 6
125.0
188
250
313
375
33.3
5
2
666.0
166.5
333.0
—
41.63 20.8
Note 6
166.5
250
333
—
33.3
4
2
532.8
133.2
266.4
66.6
33.3
16.7
Note 6
133.2
200
266
333
400
48.0
3
2
576.0
144.0
288.0
—
36
18.0
48.0
144.0
216
288
360
—
66.7
2
533.4
133.3
266.7
66.7 33.34 16.7
Note 6
133.3
200
267
333
400
Note:
1. System PLL multiplication factor.
2. System PLL VCO divider.
3. When considering operating frequencies, the valid core VCO operating range of 400–800 MHz must not be violated.
4. Due to erratum eTSEC40, csb_clk frequencies of less than 133 MHz do not support gigabit Ethernet data rates. The core
frequency must be 333 MHz for gigabit Ethernet operation. This erratum will be fixed in revision 2 silicon.
5. Frequency of USB PLL input reference.
6. USB reference clock must be supplied from a separate source as it must be 24 or 48 MHz, the USB reference must be
supplied from a separate external source using USB_CLK_IN.
Table 69. Package Thermal Characteristics for TEPBGAII
Characteristic
Board Type
Symbol
TEPBGA II
Unit
Note
Junction-to-ambient natural convection
Single layer board (1s)
RJA
25
°C/W
1, 2
Junction-to-ambient natural convection
Four layer board (2s2p)
RJA
18
°C/W
1, 2, 3
Junction-to-ambient (@200 ft/min)
Single layer board (1s)
RJMA
20
°C/W
1, 3
Junction-to-ambient (@200 ft/min)
Four layer board (2s2p)
RJMA
15
°C/W
1, 3
Junction-to-board
—
RJB
10
°C/W
4
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