參數(shù)資料
型號: MPC8321CZQAFDC
廠商: Freescale Semiconductor
文件頁數(shù): 31/82頁
文件大?。?/td> 0K
描述: IC MPU PWRQUICC II 516-PBGA
標(biāo)準(zhǔn)包裝: 40
系列: MPC83xx
處理器類型: 32-位 MPC83xx PowerQUICC II Pro
速度: 333MHz
電壓: 1V
安裝類型: 表面貼裝
封裝/外殼: 516-BBGA
供應(yīng)商設(shè)備封裝: 516-FPBGA(27x27)
包裝: 托盤
MPC8323E PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 4
Freescale Semiconductor
37
Timers
Figure 27 shows the PCI output AC timing conditions.
Figure 27. PCI Output AC Timing Measurement Condition
13 Timers
This section describes the DC and AC electrical specifications for the timers of the MPC8323E.
13.1
Timer DC Electrical Characteristics
Table 38 provides the DC electrical characteristics for the MPC8323E timer pins, including TIN, TOUT,
TGATE, and RTC_CLK.
13.2
Timer AC Timing Specifications
Table 39 provides the timer input and output AC timing specifications.
Table 38. Timer DC Electrical Characteristics
Characteristic
Symbol
Condition
Min
Max
Unit
Output high voltage
VOH
IOH = –6.0 mA
2.4
V
Output low voltage
VOL
IOL = 6.0 mA
0.5
V
Output low voltage
VOL
IOL = 3.2 mA
0.4
V
Input high voltage
VIH
—2.0
OVDD +0.3
V
Input low voltage
VIL
–0.3
0.8
V
Input current
IIN
0 V
≤ VIN ≤ OVDD
±5
μA
Table 39. Timer Input AC Timing Specifications1
Characteristic
Symbol2
Min
Unit
Timers inputs—minimum pulse width
tTIWID
20
ns
Notes:
1. Input specifications are measured from the 50% level of the signal to the 50% level of the rising edge of CLKIN. Timings are
measured at the pin.
2. Timer inputs and outputs are asynchronous to any visible clock. Timer outputs should be synchronized before use by any
external synchronous logic. Timer inputs are required to be valid for at least tTIWID ns to ensure proper operation.
CLK
Output Delay
tPCKHOV
High-Impedance
tPCKHOZ
Output
tPCKHOX
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