參數(shù)資料
型號(hào)： MPC8349EZUAJFB
廠商： Freescale Semiconductor
文件頁(yè)數(shù)： 84/87頁(yè)
文件大小： 0K
描述： IC MPU PWRQUICC II 672-TBGA
標(biāo)準(zhǔn)包裝： 24
系列： MPC83xx
處理器類(lèi)型： 32-位 MPC83xx PowerQUICC II Pro
速度： 533MHz
電壓： 1.2V
安裝類(lèi)型： 表面貼裝
封裝/外殼： 672-LBGA
供應(yīng)商設(shè)備封裝： 672-TBGA（35x35）
包裝： 托盤(pán)
配用： MPC8349E-MITX-GP-ND - KIT REFERENCE PLATFORM MPC8349E
MPC8349E-MITXE-ND - BOARD REFERENCE FOR MPC8349
MPC8349EA-MDS-PB-ND - KIT MODULAR DEV SYSTEM MPC8349E
MPC8349EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 13
Freescale Semiconductor
85
Document Revision History
9
2/2009
Added footnote 6 to Table 7.
In Section 9.2, “USB AC Electrical Specifications,” clarified that AC table is for ULPI only.
In Table 39, corrected tLBKHOV parameter to tLBKLOV (output data is driven on falling edge of clock
in DLL bypass mode). Similarly, made the same correction to Figure 22, Figure 24, and Figure 25
for output signals.
Added footnote 11 to Table 55.
Added footnote 4 to Table 66.
In Section 21.1, “System Clocking,” removed “(AVDD1)” and “(AVDD2”) from bulleted list.
In Section 21.2, “PLL Power Supply Filtering,” in the second paragraph, changed “provide five
independent filter circuits,” and “the five AVDD pins” to provide four independent filter circuits,” and
“the four AVDD pins.”
In Table 57, corrected the max csb_clk to 266 MHz.
In Table 62, added PLL configurations 903, 923, A03, A23, and 503 for 533 MHz
In Table 66, updated note 1 to say the following: “For temperature range = C, processor frequency
is limited to 533 with a platform frequency of 266.”
8
4/2007
In Table 3, “Output Drive Capability,” changed the values in the Output Impedance column and
added USB to the seventh row.
In Section 21.7, “Pull-Up Resistor Requirements,“deleted last two paragraphs and after first
paragraph, added a new paragraph.
Deleted Section 21.8, “JTAG Configuration Signals,” and Figure 43, “JTAG Interface Connection.”
7
3/2007
In Table 57, “Operating Frequencies for TBGA,” in the ‘Coherent system bus frequency (csb_clk)’
row, changed the value in the 533 MHz column to 100-333.
In Table 63, “Suggested PLL Configurations,” under the subhead, ‘33 MHz CLKIN/PCI_CLK
Options,’ added row A03 between Ref. No. 724 and 804. Under the subhead ‘66 MHz
CLKIN/PCI_CLK Options,’ added row 503 between Ref. No. 305 and 404. For Ref. No. 306,
changed the CORE PLL value to 0000110.
In Section 23, “Ordering Information,” replaced first paragraph and added a note.
In Section 23.1, “Part Numbers Fully Addressed by this Document,” replaced first paragraph.
6
2/2007
Page 1, updated first paragraph to reflect PowerQUICC II Pro information.
In Table 18, “DDR and DDR2 SDRAM Input AC Timing Specifications,” added note 2 to tCISKEW
and deleted original note 3; renumbered the remaining notes.
In Figure 41, “JTAG Interface Connection,” updated with new figure.
In Section 23.1, “Part Numbers Fully Addressed by This Document,” replaced third sentence of
first paragraph directing customer to product summary page for available frequency configuration
parts.
5
1/2007
In Table 1, “Absolute Maximum Ratings,” added (1.36 max for 667-MHz core frequency) to max
VDD and AvDD values.
In Table 2, “Recommended Operating Conditions,” added a row showing nominal core supply
voltage and PLL supply voltage of 1.3 V for 667-MHz parts.
In Table 4, “MPC8349EA Power Dissipation,” added two footnotes to 667-MHz row showing
nominal core supply voltage and PLL supply voltage of 1.3 V for 667-MHz parts.
In Table 54, “MPC83479EA (TBGA) Pinout Listing,” updated VDD nd AVDD rows to show nominal
core supply voltage and PLL supply voltage of 1.3 V for 667-MHz parts.
4
12/2006
Table 19, “DDR and DDR2 SDRAM Output AC Timing Specifications,” modified Tddkhds for 333 MHz
from 900 ps to 775 ps.
Table 68. Document Revision History (continued)
Rev.
Number
Date
Substantive Change(s)
相關(guān)PDF資料
PDF描述
FMC26DREI-S13 CONN EDGECARD 52POS .100 EXTEND
HSM25DRES CONN EDGECARD 50POS .156 EYELET
HMM25DRES CONN EDGECARD 50POS .156 EYELET
MPC8533EVTANGA MPU POWERQUICC 783-PBGA
FMC25DREN-S93 CONN EDGECARD 50POS .100 EYELET
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MPC8349EZUALDB 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:Integrated Host Processor Hardware Specifications
MPC8349EZUALFB 功能描述:微處理器 - MPU 8349 TBGA PB W/ ENCRYP RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線(xiàn)寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類(lèi)型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
MPC8349VVAGD 功能描述:IC MPU PWRQUICC II PRO 672-TBGA RoHS:是 類(lèi)別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:MPC83xx 標(biāo)準(zhǔn)包裝:1 系列:MPC85xx 處理器類(lèi)型:32-位 MPC85xx PowerQUICC III 特點(diǎn):- 速度:1.2GHz 電壓:1.1V 安裝類(lèi)型:表面貼裝 封裝/外殼:783-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:783-FCPBGA（29x29） 包裝:托盤(pán)
MPC8349VVAGDB 功能描述:微處理器 - MPU 8349 TBGA NO-PB W/O ENC RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線(xiàn)寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類(lèi)型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
MPC8349VVAGFB 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:Integrated Host Processor Hardware Specifications
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*