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參數(shù)資料
| 型號(hào)： | MPC8360EVVAJDGA |
| 廠商： | Freescale Semiconductor |
| 文件頁(yè)數(shù)： | 9/12頁(yè) |
| 文件大小： | 0K |
| 描述： | IC MPU POWERQUICC II PRO 740TBGA |
| 標(biāo)準(zhǔn)包裝： | 21 |
| 系列： | MPC83xx |
| 處理器類型： | 32-位 MPC83xx PowerQUICC II Pro |
| 速度： | 533MHz |
| 電壓： | 1.2V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 740-LBGA |
| 供應(yīng)商設(shè)備封裝： | 740-TBGA（37.5x37.5） |
| 包裝： | 托盤 |
| 配用： | MPC8360EA-MDS-PB-ND - KIT APPLICATION DEV 8360 SYSTEM MPC8360E-RDK-ND - BOARD REFERENCE DESIGN FOR MPC |
MPC8360E PowerQUICC II Pro Processor Product Brief, Rev. 0
6
Freescale Semiconductor
Preliminary—Subject to Change Without Notice
Architecture Overview
LAN interface can be connected to the PCI bus supporting 802.11-a/b/g/n connectivity within the office
environment.
Finally, the security engine provides acceleration for encryption, authentication, and standards based
tunnelling as required by IP-Sec.
3
Architecture Overview
The PowerQUICC II Pro MPC8360E is a high performance, highly integrated communication processor
solution.
3.1
MPC8360E Features
High-performance, low power, and cost-effective communications processor
The MPC8360E QUICC Engine offers a future-proof solution for next generation designs by
supporting programmable protocol termination, network interface termination, and interworking
features to meet evolving protocol standards
Single platform architecture supports the convergence of IP packet networks and ATM networks,
including interworking between these networks
Simplified network interface card design with a cost-effective single chip data plane/control plane
solution for ATM or IP packet processing (or both). This reduces component count, board power
consumption, and board real estate.
Universal network interface card design for multiple applications, which lowers costs and reduces
time-to-market
Built-in proprietary hardware accelerators that accelerate data plane traffic, such as interworking,
and control plane packet snooping, such as IGMP, VLAN tagging, DHCP, and so on
DDR memory controller—one 64-bit or 2x32-bit interfaces that split data and control plane traffic
at up to 333 MHz
e300 PowerPC core (enhanced version of MPC603e core with 32 Kbytes of level 1 instruction and
32 Kbytes of level 1 data caches)
32-bit PCI interface
32-bit local bus interface
USB
Integrated 8-port L2 Ethernet switch
— 8 connection ports of 10/100 Mbps MII/RMII & one CPU internal port
— Each port supports four priority levels
— Priority levels used with VLAN tags or IP TOS field to implement QoS
— QoS types of traffic, such as voice, video, and data
Security engine provides termination or encrypted plane traffic
High degree of software compatibility with previous-generation PowerQUICC processor-based
designs for backward compatibility and easier software migration
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MPC8360EVVAJDHA | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications |
| MPC8360EVVAJFGA | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications |
| MPC8360EVVAJFHA | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications |
| MPC8360EVVALDGA | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications |
| MPC8360EVVALDHA | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications |
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