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| 型號(hào)： | MPC8360VVAJDGA |
| 廠商： | Freescale Semiconductor |
| 文件頁(yè)數(shù)： | 11/102頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC MPU POWERQUICC II PRO 740TBGA |
| 標(biāo)準(zhǔn)包裝： | 21 |
| 系列： | MPC83xx |
| 處理器類型： | 32-位 MPC83xx PowerQUICC II Pro |
| 速度： | 533MHz |
| 電壓： | 1.2V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 740-LBGA |
| 供應(yīng)商設(shè)備封裝： | 740-TBGA（37.5x37.5） |
| 包裝： | 托盤 |
| 配用： | MPC8360EA-MDS-PB-ND - KIT APPLICATION DEV 8360 SYSTEM MPC8360E-RDK-ND - BOARD REFERENCE DESIGN FOR MPC |
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MPC8360E/MPC8358E PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 5
16
Freescale Semiconductor
RESET DC Electrical Characteristics
5
RESET Initialization
This section describes the DC and AC electrical specifications for the reset initialization timing and electrical requirements of
the MPC8360E/58E.
5.1
RESET DC Electrical Characteristics
This table provides the DC electrical characteristics for the RESET pins of the device.
GTX_CLK rise and fall time
LVDD = 2.5 V
LVDD = 3.3 V
tG125R/tG125F
——
0.75
1.0
ns
GTX_CLK125 duty cycle
GMII & TBI
1000Base-T for RGMII & RTBI
tG125H/tG125
45
47
—
55
53
%
GTX_CLK125 jitter
—
±150
ps
Notes:
1. Rise and fall times for GTX_CLK125 are measured from 0.5 and 2.0 V for LVDD = 2.5 V and from 0.6 and 2.7 V for
LVDD =3.3 V.
2. GTX_CLK125 is used to generate the GTX clock for the UCC Ethernet transmitter with 2% degradation. The GTX_CLK125
duty cycle can be loosened from 47%/53% as long as the PHY device can tolerate the duty cycle generated by GTX_CLK.
See Section 8.2.2, “MII AC Timing Specifications,” Section 8.2.3, “RMII AC Timing Specifications,” and Section 8.2.5,
“RGMII and RTBI AC Timing Specifications” for the duty cycle for 10Base-T and 100Base-T reference clock.
Table 10. RESET Pins DC Electrical Characteristics 1
Characteristic
Symbol
Condition
Min
Max
Unit
Input high voltage
VIH
—2.0
OVDD + 0.3
V
Input low voltage
VIL
—–0.3
0.8
V
Input current
IIN
——
±10
μA
Output high voltage
VOH
IOH = –8.0 mA
2.4
—
V
Output low voltage
VOL
IOL = 8.0 mA
—
0.5
V
Output low voltage
VOL
IOL = 3.2 mA
—
0.4
V
Notes:
1. This table applies for pins PORESET, HRESET, SRESET, and QUIESCE.
2. HRESET and SRESET are open drain pins, thus VOH is not relevant for those pins.
Table 9. GTX_CLK125 AC Timing Specifications
At recommended operating conditions with LVDD = 2.5 ± 0.125 mV/ 3.3 V ± 165 mV (continued)
Parameter/Condition
Symbol
Min
Typical
Max
Unit
Notes
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MPC8360VVAJDHA | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications |
| MPC8360VVAJFGA | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications |
| MPC8360VVAJFHA | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications |
| MPC8360VVALDGA | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications |
| MPC8360VVALDHA | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications |
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