參數(shù)資料
型號: MPC8379ECVRAGD
廠商: Freescale Semiconductor
文件頁數(shù): 62/117頁
文件大?。?/td> 0K
描述: MPU POWERQUICC II PRO 689-PBGA
標(biāo)準(zhǔn)包裝: 27
系列: MPC83xx
處理器類型: 32-位 MPC83xx PowerQUICC II Pro
速度: 400MHz
電壓: 1V
安裝類型: 表面貼裝
封裝/外殼: 689-BBGA 裸露焊盤
供應(yīng)商設(shè)備封裝: 689-TEPBGA II(31x31)
包裝: 托盤
MPC8379E PowerQUICC II Pro Processor Hardware Specifications, Rev. 8
Freescale Semiconductor
49
This figure provides the eSDHC clock input timing diagram.
Figure 29. eSDHC Clock Input Timing Diagram
11.3.1
High-Speed Output Path (Write)
This figure provides the data and command output timing diagram.
Figure 30. High Speed Output Path
11.3.1.1
High-Speed Write Meeting Setup (Maximum Delay)
The following equations show how to calculate the allowed skew range between the SD_CLK and
SD_DAT/CMD signals on the PCB.
Zero clock delay:
tSHSKHOV + tDATA_DELAY + tISU < tSHSCKL
Eqn. 10
With clock delay:
tSHSKHOV + tDATA_DELAY + tISU < tSHSCKL + tCLK_DELAY
Eqn. 11
tDATA_DELAY tCLK_DELAY < tSHSCKL tISU tSHSKHOV
Eqn. 12
eSDHC
tSHSCKR
External Clock
VM
tSHSCK
tSHSCKF
VM = Midpoint Voltage (OVDD/2)
operational mode
tSHSCKL
tSHSCKH
Output valid time: tSHSKHOV
Output hold time: tSHSKHOX
tIH (2 ns)
tCLK_DELAY
Input at the
SD CLK at
Driving
Edge
Sampling
edge
the card Pin
SD card pins
tISU (6 ns)
tDATA_DELAY
tSHSCKL
tSHSCK (clock cycle)
SD CLK at the
MPC8379E pin
Output from the
MPC8379E pins
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參數(shù)描述
MPC8379ECVRAGDA 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications
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MPC8379ECVRAJF 功能描述:微處理器 - MPU PBGA W/ ENCR RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324