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參數(shù)資料
| 型號： | MPC8379ECVRAJF |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 15/117頁 |
| 文件大小： | 0K |
| 描述： | MPU POWERQUICC II PRO 689-PBGA |
| 標準包裝： | 27 |
| 系列： | MPC83xx |
| 處理器類型： | 32-位 MPC83xx PowerQUICC II Pro |
| 速度： | 533MHz |
| 電壓： | 1V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 689-BBGA 裸露焊盤 |
| 供應商設備封裝： | 689-TEPBGA II（31x31） |
| 包裝： | 托盤 |
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MPC8379E PowerQUICC II Pro Processor Hardware Specifications, Rev. 8
Freescale Semiconductor
111
These capacitors should have a value of 0.01 or 0.1 F. Only ceramic SMT (surface mount technology)
capacitors should be used to minimize lead inductance, preferably 0402 or 0603 sizes.
In addition, it is recommended that there be several bulk storage capacitors distributed around the PCB,
feeding the VDD, OVDD, GVDD, and LVDD planes, to enable quick recharging of the smaller chip
capacitors. These bulk capacitors should have a low ESR (equivalent series resistance) rating to ensure the
quick response time necessary. They should also be connected to the power and ground planes through two
vias to minimize inductance. Suggested bulk capacitors—100–330 F (AVX TPS tantalum or Sanyo
OSCON).
24.3
Connection Recommendations
To ensure reliable operation, it is highly recommended that unused inputs be connected to an appropriate
signal level. Unused active low inputs should be tied to OVDD, GVDD, or LVDD as required. Unused
active high inputs should be connected to GND. All NC (no-connect) signals must remain unconnected.
Power and ground connections must be made to all external VDD, GVDD, LVDD, OVDD, and GND pins
of the device.
24.4
Output Buffer DC Impedance
The device drivers are characterized over process, voltage, and temperature. For all buses, the driver is a
push-pull single-ended driver type (open drain for I2C).
To measure Z0 for the single-ended drivers, an external resistor is connected from the chip pad to OVDD
or GND. Then, the value of each resistor is varied until the pad voltage is OVDD/2 (see Figure 63). The
output impedance is the average of two components, the resistances of the pull-up and pull-down devices.
When data is held high, SW1 is closed (SW2 is open) and RP is trimmed until the voltage at the pad equals
OVDD/2. RP then becomes the resistance of the pull-up devices. RP and RN are designed to be close to each
other in value. Then, Z0 = (RP + RN)/2.
Figure 63. Driver Impedance Measurement
OVDD
OGND
RP
RN
Pad
Data
SW1
SW2
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MPC8379ECVRAJFA | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications |
| MPC8379ECVRAJGA | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications |
| MPC8379ECVRALDA | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications |
| MPC8379ECVRALFA | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications |
| MPC8379ECVRALG | 功能描述:微處理器 - MPU PBGA W/ ENCR RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-324 |
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