參數(shù)資料
型號(hào): MPC8379EVRAGD
廠商: Freescale Semiconductor
文件頁數(shù): 76/127頁
文件大?。?/td> 0K
描述: MPU PWRQUICC II 400MHZ 689TEPBGA
產(chǎn)品培訓(xùn)模塊: MPC837x PowerQUICC II Pro Processors
視頻文件: Introduction to the MPC837x Family
標(biāo)準(zhǔn)包裝: 27
系列: MPC83xx
處理器類型: 32-位 MPC83xx PowerQUICC II Pro
速度: 400MHz
電壓: 1V
安裝類型: 表面貼裝
封裝/外殼: 689-BBGA 裸露焊盤
供應(yīng)商設(shè)備封裝: 689-TEPBGA II(31x31)
包裝: 托盤
配用: MPC8377E-RDBA-ND - BOARD REF DES MPC8377 REV 2.1
MPC8377E-MDS-PB-ND - BOARD MODULAR DEV SYSTEM
MPC8377E PowerQUICC II Pro Processor Hardware Specifications, Rev. 8
52
Freescale Semiconductor
clock falling edge. Note that the internal clock which is guaranteed to be 50% duty cycle is used to sample
the data, and therefore used in the equations.
11.3.2.1
High-Speed Read Meeting Setup (Maximum Delay)
The following equations show how to calculate the allowed combined propagation delay range of the
SD_CLK and SD_DAT/CMD signals on the PCB.
tCLK_DELAY + tDATA_DELAY + tODLY + tSHSIVKH < 1.5 × tSHSCK
Eqn. 15
tCLK_DELAY + tDATA_DELAY < 1.5 × tSHSCK tODLY tSHSIVKH
Eqn. 16
This means that Data + Clock delay can be up to 11 ns for a 20 ns clock cycle:
tCLK_DELAY + tDATA_DELAY < 30 14 5
tCLK_DELAY + tDATA_DELAY < 11
11.3.2.2
High-Speed Read Meeting Hold (Minimum Delay)
The following equations show how to calculate the allowed combined propagation delay range of the
SD_CLK and SD_DAT/CMD signals on the PCB.
0.5
× tSHSCK < tCLK_DELAY + tDATA_DELAY + tOH tSHSIXKH + tINT_CLK_DLY
Eqn. 17
0.5
× tSHSCK tOH + tSHSIXKH tINT_CLK_DLY < tCLK_DELAY + tDATA_DELAY
Eqn. 18
This means that Data + Clock delay must be greater than ~6 ns for a 20 ns clock cycle:
10 2.5 + (–1.5) < tCLK_DELAY + tDATA_DELAY
6 < tCLK_DELAY + tDATA_DELAY
11.3.2.3
High-Speed Read Combined Formula
The following equation is the combined formula to calculate the propagation delay range of the SD_CLK
and SD_DAT/CMD signals on the PCB.
0.5
× tSHSCK tOH + tSHSIXKH < tCLK_DELAY + tDATA_DELAY < 1.5 × tSHSCK tODLY tSHSIVKH
Eqn. 19
12 JTAG
This section describes the DC and AC electrical specifications for the IEEE 1149.1 (JTAG) interface of
the chip.
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參數(shù)描述
MPC8379EVRAGDA 功能描述:微處理器 - MPU 8379 PBGA ST PbFr W/ENC RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
MPC8379EVRAGFA 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications
MPC8379EVRAGGA 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications
MPC8379EVRAJDA 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications
MPC8379EVRAJF 功能描述:微處理器 - MPU PBGA W/ ENCR RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324