• 參數(shù)資料
    型號(hào): MPC8533EVTARJ
    廠商: Freescale Semiconductor
    文件頁數(shù): 104/112頁
    文件大?。?/td> 0K
    描述: MPU POWERQUICC 783-PBGA
    標(biāo)準(zhǔn)包裝: 36
    系列: MPC85xx
    處理器類型: 32-位 MPC85xx PowerQUICC III
    速度: 1.067GHz
    電壓: 0.95 V ~ 1.05 V
    安裝類型: 表面貼裝
    封裝/外殼: 783-BBGA,F(xiàn)CBGA
    供應(yīng)商設(shè)備封裝: 783-FCPBGA(29x29)
    包裝: 托盤
    MPC8533E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 6
    Freescale Semiconductor
    91
    Thermal
    19.6.2
    Platform to FIFO Restrictions
    Please note the following FIFO maximum speed restrictions based on platform speed. Refer to Section 4.4,
    “Platform to FIFO Restrictions,” for additional information.
    20 Thermal
    This section describes the thermal specifications of the MPC8533E.
    20.1
    Thermal Characteristics
    Table 65 provides the package thermal characteristics.
    Table 64. FIFO Maximum Speed Restrictions
    Platform Speed (MHz)
    Maximum FIFO Speed for Reference Clocks TSECn_TX_CLK, TSECn_RX_CLK
    (MHz)1
    533
    126
    400
    94
    Note:
    1. FIFO speed should be less than 24% of the platform speed.
    Table 65. Package Thermal Characteristics
    Characteristic
    JEDEC Board
    Symbol
    Value
    Unit
    Notes
    Junction-to-ambient natural convection
    Single layer board (1s)
    RJA
    26
    C/W
    1, 2
    Junction-to-ambient natural convection
    Four layer board (2s2p)
    RJA
    21
    C/W
    1, 2
    Junction-to-ambient (@200 ft/min)
    Single layer board (1s)
    RJA
    21
    C/W
    1, 2
    Junction-to-ambient (@200 ft/min)
    Four layer board (2s2p)
    RJA
    17
    C/W
    1, 2
    Junction-to-board thermal
    RJB
    12
    C/W
    3
    Junction-to-case thermal
    RJC
    <0.1
    C/W
    4
    Notes:
    1. Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance, mounting site (board)
    temperature, ambient temperature, airflow, power dissipation of other components on the board, and board thermal
    resistance.
    2. Per JEDEC JESD51-2 and JESD51-6 with the board (JESD51-9) horizontal.
    3. Thermal resistance between the die and the printed-circuit board per JEDEC JESD51-8. Board temperature is measured on
    the top surface of the board near the package.
    4. Thermal resistance between the active surface of the die and the case top surface determined by the cold plate method (MIL
    SPEC-883 Method 1012.1) with the calculated case temperature. Actual thermal resistance is less than 0.1
    C/W.
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