- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄3936 > MPC8535CVTAKGA (Freescale Semiconductor)MPU POWERQUICC III 783FCPBGA PDF資料下載
參數(shù)資料
| 型號： | MPC8535CVTAKGA |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 20/126頁 |
| 文件大?。?/td> | 0K |
| 描述： | MPU POWERQUICC III 783FCPBGA |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | MPC85xx |
| 處理器類型： | 32-位 MPC85xx PowerQUICC III |
| 速度： | 600MHz |
| 電壓： | 1V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 783-BBGA，F(xiàn)CBGA |
| 供應(yīng)商設(shè)備封裝： | 783-FCPBGA（29x29） |
| 包裝： | 托盤 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁當(dāng)前第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁
MPC8535E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
Hardware Design Considerations
Freescale Semiconductor
116
To measure Z0 for the single-ended drivers, an external resistor is connected from the chip pad to OVDD or GND. Then, the
value of each resistor is varied until the pad voltage is OVDD/2 (see Figure 77). The output impedance is the average of two
components, the resistances of the pull-up and pull-down devices. When data is held high, SW1 is closed (SW2 is open) and
RP is trimmed until the voltage at the pad equals OVDD/2. RP then becomes the resistance of the pull-up devices. RP and RN
are designed to be close to each other in value. Then, Z0 = (RP + RN)/2.
Figure 77. Driver Impedance Measurement
This table summarizes the signal impedance targets. The driver impedances are targeted at minimum VDD, nominal OVDD,
105
°C.
3.9
Configuration Pin Muxing
The chip provides the user with power-on configuration options which can be set through the use of external pull-up or
pull-down resistors of 4.7 k
Ω on certain output pins (see customer visible configuration pins). These pins are generally used as
output only pins in normal operation.
While HRESET is asserted however, these pins are treated as inputs. The value presented on these pins while HRESET is
asserted, is latched when HRESET deasserts, at which time the input receiver is disabled and the I/O circuit takes on its normal
function. Most of these sampled configuration pins are equipped with an on-chip gated resistor of approximately 20 k
Ω. This
value should permit the 4.7-k
Ω resistor to pull the configuration pin to a valid logic low level. The pull-up resistor is enabled
only during HRESET (and for platform /system clocks after HRESET deassertion to ensure capture of the reset value). When
the input receiver is disabled the pull-up is also, thus allowing functional operation of the pin as an output with minimal signal
quality or delay disruption. The default value for all configuration bits treated this way has been encoded such that a high voltage
level puts the chip into the default state and external resistors are needed only when non-default settings are required by the user.
Table 81. Impedance Characteristics
Impedance
Local Bus, Ethernet, DUART,
Control, Configuration, Power
Management
PCI
DDR DRAM
Symbol Unit
RN
45 Target
45 Target (cfg_pci_impd=1)
25 Target (cfg_pci_impd=0)
18 Target (full strength mode)
36 Target (full strength mode)
Z0
Ω
RP
45 Target
45 Target (cfg_pci_impd=1)
25 Target (cfg_pci_impd=0)
18 Target (full strength mode)
36 Target (full strength mode)
Z0
Ω
Note: Nominal supply voltages. See Table 1.
OVDD
OGND
RP
RN
Pad
Data
SW1
SW2
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CAT25320HU3I-GT3 | IC EEPROM 32KB SPI SERIAL 8UDFN |
| MPC8535AVTAQGA | MPU POWERQUICC III 783FCPBGA |
| CAT25320VP2I-GT3 | IC EEPROM 32KB SPI SER 8TDFN |
| MPC8535AVTAKGA | MPU POWERQUICC III 783FCPBGA |
| CAT25160YI-GT3JN | IC EEPROM SRL 16KB I2C 8TSSOP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MPC8535CVTANG | 功能描述:微處理器 - MPU 8535 INDUSTRIAL 800 EXT RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| MPC8535CVTANGA | 功能描述:微處理器 - MPU 8535 Non E RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| MPC8535CVTAQG | 功能描述:微處理器 - MPU 8535 INDUSTRIAL 1000 EXT RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| MPC8535CVTAQGA | 功能描述:微處理器 - MPU 8535 Non E Ext Temp RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| MPC8535CVTATH | 功能描述:微處理器 - MPU 8535 INDUSTRIAL 1250 EXT RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。