
MPC8535E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
Electrical Characteristics
Freescale Semiconductor
74
Figure 42. Local Bus Signals, GPCM/UPM Signals for LCRR[CLKDIV] = 8 or 16(PLL Enabled)
2.13
Enhanced Secure Digital Host Controller (eSDHC)
This section describes the DC and AC electrical specifications for the eSDHC interface of the chip.
2.13.1
eSDHC DC Electrical Characteristics
This table provides the DC electrical characteristics for the eSDHC interface of the chip.
Table 55. eSDHC interface DC Electrical Characteristics
At recommended operating conditions (see
Table 3)Characteristic
Symbol
Condition
Min
Max
Unit
Notes
Input high voltage
VIH
—
0.625 * OVDD
OVDD+0.3
V
—
Input low voltage
VIL
—
–0.3
0.25 * OVDD
V
—
Input/Output leakage current
IIN/IOZ
—
–10
10
uA—
Output high voltage
VOH
IOH = -100 uA @OVDDmin 0.75 * OVDD
—
V
—
LSYNC_IN
UPM Mode Input Signal:
LUPWAIT
tLBIXKH2
tLBIVKH2
tLBIVKH1
tLBIXKH1
tLBKHOZ1
T1
T3
UPM Mode Output Signals:
GPCM Mode Output Signals:
tLBKHOV1
tLBKHOZ1
T2
T4
Input Signals:
LAD[0:31]/LDP[0:3]
(PLL Bypass Mode)
LCS[0:7]/LWE
LCS[0:7]/LBS[0:3]/LGPL[0:5]
GPCM Mode Input Signal
LGTA