參數(shù)資料
型號: MPC8536AVTATH
廠商: Freescale Semiconductor
文件頁數(shù): 62/126頁
文件大?。?/td> 0K
描述: MPU PWRQUICC III 1250MHZ 783PBGA
標(biāo)準(zhǔn)包裝: 1
系列: MPC85xx
處理器類型: 32-位 MPC85xx PowerQUICC III
速度: 1.25GHz
電壓: 1V
安裝類型: 表面貼裝
封裝/外殼: 783-BBGA,F(xiàn)CBGA
供應(yīng)商設(shè)備封裝: 783-FCPBGA(29x29)
包裝: 托盤
MPC8536E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
Electrical Characteristics
Freescale Semiconductor
40
2.8
DUART
This section describes the DC and AC electrical specifications for the DUART interface of the chip.
2.8.1
DUART DC Electrical Characteristics
This table provides the DC electrical characteristics for the DUART interface.
2.8.2
DUART AC Electrical Specifications
This table provides the AC timing parameters for the DUART interface.
2.9
Ethernet: Enhanced Three-Speed Ethernet (eTSEC),
MII Management
This section provides the AC and DC electrical characteristics for enhanced three-speed and MII management.
Table 22. DUART DC Electrical Characteristics
Parameter
Symbol
Min
Max
Unit
High-level input voltage
VIH
2OVDD + 0.3
V
Low-level input voltage
VIL
– 0.3
0.8
V
Input current
(VIN
1 = 0 V or V
IN = VDD)
IIN
—±5
μA
High-level output voltage
(OVDD = min, IOH = –2 mA)
VOH
2.4
V
Low-level output voltage
(OVDD = min, IOL = 2 mA)
VOL
—0.4
V
Note:
1. Note that the symbol VIN, in this case, represents the OVIN symbol referenced in Table 1 and Table 2.
Table 23. DUART AC Timing Specifications
Parameter
Value
Unit
Notes
Minimum baud rate
CCB clock/1,048,576
baud
2
Maximum baud rate
CCB clock/16
baud
2,3
Oversample rate
16
4
Notes:
2. CCB clock refers to the platform clock.
3. Actual attainable baud rate will be limited by the latency of interrupt processing.
4. The middle of a start bit is detected as the 8th sampled 0 after the 1-to-0 transition of the start bit.
Subsequent bit values are sampled each 16th sample.
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