參數(shù)資料
型號: MPC8544DVTALF
廠商: Freescale Semiconductor
文件頁數(shù): 109/117頁
文件大小: 0K
描述: IC MPU POWERQUICC III 783-FCBGA
產(chǎn)品培訓(xùn)模塊: MPC8544E PowerQUICC™ III
標準包裝: 1
系列: MPC85xx
處理器類型: 32-位 MPC85xx PowerQUICC III
速度: 667MHz
電壓: 0.95 V ~ 1.05 V
安裝類型: 表面貼裝
封裝/外殼: 783-BBGA,F(xiàn)CBGA
供應(yīng)商設(shè)備封裝: 783-FCPBGA(29x29)
包裝: 托盤
配用: MPC8544DS-ND - BOARD DEVELOPMENT SYSTEM 8544
MPC8544E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 6
Freescale Semiconductor
91
Package Description
AVDD_SRDS
W28
Power for
SRDSPLL
(1.0 V)
—19
AVDD_SRDS2
AG1
Power for
SRDSPLL
(1.0 V)
—19
SENSEVDD
W11
O
VDD
12
SENSEVSS
W10
12
Analog Signals
MVREF
A28
Reference
voltage signal
for DDR
MVREF
SD1_IMP_CAL_RX
M26
200
Ω to GND
SD1_IMP_CAL_TX
AE28
100
Ω to GND
SD1_PLL_TPA
V26
AVDD_SRDS
ANALOG
17
SD2_IMP_CAL_RX
AH3
I
200
Ω to GND
SD2_IMP_CAL_TX
Y1
I
100
Ω to GND
SD2_PLL_TPA
AH1
O
AVDD_SRDS2
ANALOG
17
No Connect Pins
NC
C19, D7, D10, K13, L6, K9, B6, F12, J7, M19,
M25, N19, N24, P19, R19, AB19, T12, W3,
M12, W5, P12, T19, W1, W7, L13, U19, W4, V8,
V9, V10, V11, V12, V13, V14, V15, V16, V17,
V18, V19, W2, W6, W8, T11, U11, W12, W13,
W14, W15, W16, W17, W18, W19, W27, V25,
Y17, Y18, Y19, AA18, AA19, AB20, AB21,
AB22, AB23, J9
——
Notes:
1.All multiplexed signals are listed only once and do not re-occur. For example, LCS5/DMA_REQ2 is listed only once in the
Local Bus Controller Interface section, and is not mentioned in the DMA section even though the pin also functions as
DMA_REQ2.
2.Recommend a weak pull-up resistor (2–10 K
Ω) be placed on this pin to OVDD.
3.This pin must always be pulled high.
4.This pin is a reset configuration pin. It has a weak internal pull-up P-FET which is enabled only when the processor is in the
reset state. This pull-up is designed such that it can be overpowered by an external 4.7-k
Ω pull-down resistor. However, if
the signal is intended to be high after reset, and if there is any device on the net which might pull down the value of the net
at reset, then a pull-up or active driver is needed. TSEC3_TXD[3] (cfg_srds_sgmii_refclk) is an exception, because the
default value of this configuration signal is low (0). Thus, no external pull-down resistor is needed for selecting the default
configuration value.
5. Treat these pins as no connects (NC) unless using debug address functionality.
Table 62. MPC8544E Pinout Listing (continued)
Signal
Package Pin Number
Pin Type
Power
Supply
Notes
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