參數(shù)資料
型號: MPC8545CPXAQGA
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 1000 MHz, MICROPROCESSOR, PBGA783
封裝: 29 X 29 MM, 1 MM PITCH, FLIP CHIP, PLASTIC, BGA-783
文件頁數(shù): 104/142頁
文件大?。?/td> 1504K
代理商: MPC8545CPXAQGA
MPC8548E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
64
Freescale Semiconductor
High-Speed Serial Interfaces (HSSI)
— To meet the input amplitude requirement, the reference clock inputs might need to be DC- or
AC-coupled externally. For the best noise performance, the reference of the clock could be DC-
or AC-coupled into the unused phase (SD_REF_CLK) through the same source impedance as
the clock input (SD_REF_CLK) in use.
Figure 40. Differential Reference Clock Input DC Requirements (External DC-Coupled)
Figure 41. Differential Reference Clock Input DC Requirements (External AC-Coupled)
Figure 42. Single-Ended Reference Clock Input DC Requirements
15.2.3
Interfacing With Other Differential Signaling Levels
With on-chip termination to SGND_SRDSn (xcorevss), the differential reference clocks inputs are
HCSL (high-speed current steering logic) compatible DC-coupled.
Many other low voltage differential type outputs like LVDS (low voltage differential signaling) can
be used but may need to be AC-coupled due to the limited common mode input range allowed (100
to 400 mV) for DC-coupled connection.
SD_REF_CLK
Vmax < 800 mV
Vmin > 0V
100 mV < Vcm < 400 mV
200 mV < Input Amplitude or Differential Peak < 800 mV
SD_REF_CLK
Vcm
200 mV < Input Amplitude or Differential Peak < 800 mV
Vmax < Vcm + 400 mV
Vmin > Vcm – 400 mV
SD_REF_CLK
400 mV < SD_REF_CLK Input Amplitude < 800 mV
0 V
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