參數(shù)資料
型號(hào): MPC8560PXAPDB
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 833 MHz, RISC PROCESSOR, PBGA783
封裝: 29 X 29 MM, 3.75 MM HEIGHT, 1 MM PITCH, FLIP CHIP, PLASTIC, BGA-783
文件頁(yè)數(shù): 74/108頁(yè)
文件大?。?/td> 2170K
代理商: MPC8560PXAPDB
MPC8560 Integrated Processor Hardware Specifications, Rev. 3.1
68
Freescale Semiconductor
RapidIO
The specifications apply over the supply voltage and ambient temperature ranges specified by the device
vendor.
The specifications apply for any combination of data patterns on the data signals.
The specifications apply over the receiver common mode and differential input voltage ranges.
Clock specifications apply only to clock signals.
Data specifications apply only to data signals (FRAME, D[0:7])
Table 50. RapidIO Receiver AC Timing Specifications—500 Mbps Data Rate
Characteristic
Symbol
Range
Unit
Notes
Min
Max
Duty cycle of the clock input
DC
47
53
%
1, 5
Data valid
DV
1080
ps
2
Allowable static skew between any two data
inputs within a 8-/9-bit group
tDPAIR
380
ps
3
Allowable static skew of data inputs to associated
clock
tSKEW,PAIR
–300
300
ps
4
Notes:
1.Measured at VID = 0 V.
2.Measured using the RapidIO receive mask shown in Figure 46.
3.See Figure 49.
5.Guaranteed by design.
Table 51. RapidIO Receiver AC Timing Specifications—750 Mbps Data Rate
Characteristic
Symbol
Range
Unit
Notes
Min
Max
Duty cycle of the clock input
DC
47
53
%
1, 5
Data valid
DV
600
ps
2
Allowable static skew between any two data
inputs within a 8-/9-bit group
tDPAIR
400
ps
3
Allowable static skew of data inputs to associated
clock
tSKEW,PAIR
–267
267
ps
4
Notes:
1.Measured at VID = 0 V.
2.Measured using the RapidIO receive mask shown in Figure 46.
3.See Figure 49.
5.Guaranteed by design.
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