參數(shù)資料
型號： MPC8568CVTAUJJA
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 1333 MHz, RISC PROCESSOR, PBGA1023
封裝： 33 X 33 MM, 2.75 MM HEIGHT, 1 MM PITCH, LEAD FREE, PLASTIC, FCPBGA-1023
文件頁數(shù)： 54/140頁
文件大小： 1456K
代理商： MPC8568CVTAUJJA
MPC8568E/MPC8567E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 0
20
Freescale Semiconductor
DDR and DDR2 SDRAM
Table 15 provides the DDR capacitance when GV
DD (typ)=2.5 V.
Table 16 provides the current draw characteristics for MVREF.
Input low voltage
VIL
–0.3
MVREF– 0.15
V
—
Output leakage current
IOZ
–10
10
μA4
Output high current (VOUT = 1.95 V)
IOH
–16.2
—
mA
—
Output low current (VOUT = 0.35 V)
IOL
16.2
—
mA
—
Notes:
1. GVDD is expected to be within 50 mV of the DRAM GVDD at all times.
2. MVREF is expected to be equal to 0.5 × GVDD, and to track GVDD DC variations as measured at the receiver.
Peak-to-peak noise on MVREF may not exceed ±2% of the DC value.
3. VTT is not applied directly to the device. It is the supply to which far end signal termination is made and is expected to be
equal to MVREF. This rail should track variations in the DC level of MVREF.
4. Output leakage is measured with all outputs disabled, 0 V
≤ VOUT ≤ GVDD.
Table 15. DDR SDRAM Capacitance for GVDD (typ) = 2.5 V
Parameter/Condition
Symbol
Min
Max
Unit
Notes
Input/output capacitance: DQ, DQS
CIO
68
pF
1
Delta input/output capacitance: DQ, DQS
CDIO
—0.5
pF
1
Note:
1. This parameter is sampled. GVDD = 2.5 V ± 0.125 V, f = 1 MHz, TA =25°C, VOUT = GVDD/2,
VOUT (peak-to-peak) = 0.2 V.
Table 16. Current Draw Characteristics for MVREF
Parameter / Condition
Symbol
Min
Max
Unit
Note
Current draw for MVREF
IMVREF
—
500
μA1
1. The voltage regulator for MVREF must be able to supply up to 500 μA current.
Table 14. DDR SDRAM DC Electrical Characteristics for GVDD (typ) = 2.5 V (continued)
Parameter/Condition
Symbol
Min
Max
Unit
Notes
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