MPC8572E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
Freescale Semiconductor
67
I
2C
Figure 39 provides the boundary-scan timing diagram.
Figure 39. Boundary-Scan Timing Diagram
13 I2C
This section describes the DC and AC electrical characteristics for the I2C interfaces of the MPC8572E.
13.1
I2C DC Electrical Characteristics
Table 54 provides the DC electrical characteristics for the I2C interfaces. Table 54. I2C DC Electrical Characteristics
Parameter
Symbol
Min
Max
Unit
Notes
Input high voltage level
VIH
0.7
× OVDD
OVDD + 0.3
V
—
Input low voltage level
VIL
–0.3
0.3
× OVDD
V—
Low level output voltage
VOL
00.4
V
1
Pulse width of spikes which must be suppressed by the
input filter
tI2KHKL
050
ns
2
Input current each I/O pin (input voltage is between
0.1
× OVDD and 0.9 × OVDD(max)
II
–10
10
μA3
Capacitance for each I/O pin
CI
—10
pF
—
Notes:
1. Output voltage (open drain or open collector) condition = 3 mA sink current.
2. Refer to the
MPC8572E PowerQUICC III Integrated Host Processor Family Reference Manual for information on the digital
filter used.
3. I/O pins will obstruct the SDA and SCL lines if OVDD is switched off.
VM = Midpoint Voltage (OVDD/2)
VM
tJTDVKH
tJTDXKH
Boundary
Data Outputs
Data Outputs
JTAG
External Clock
Boundary
Data Inputs
Output Data Valid
tJTKLDX
tJTKLDZ
tJTKLDV
Input
Data Valid
Output Data Valid