參數(shù)資料
型號: MPC8572LPXARLD
廠商: Freescale Semiconductor
文件頁數(shù): 54/138頁
文件大小: 0K
描述: MPU POWERQUICC III 1023-PBGA
標準包裝: 1
系列: MPC85xx
處理器類型: 32-位 MPC85xx PowerQUICC III
速度: 1.067GHz
電壓: 1.1V
安裝類型: 表面貼裝
封裝/外殼: 1023-BBGA,F(xiàn)CBGA
供應商設備封裝: 1023-FCPBGA(33x33)
包裝: 托盤
MPC8572E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
22
Freescale Semiconductor
DDR2 and DDR3 SDRAM Controller
Figure 3 shows the DDR2 and DDR3 SDRAM interface input timing diagram.
Figure 3. DDR2 and DDR3 SDRAM Interface Input Timing Diagram
6.2.2
DDR2 and DDR3 SDRAM Interface Output AC Timing Specifications
Table 18 contains the output AC timing targets for the DDR2 and DDR3 SDRAM interface.
Table 18. DDR2 and DDR3 SDRAM Interface Output AC Timing Specifications
At recommended operating conditions with GVDD of 1.8 V ± 5% for DDR2 or 1.5 V ± 5% for DDR3.
Parameter
Symbol 1
Min
Max
Unit
Notes
MCK[n] cycle time
tMCK
2.5
5
ns
2
ADDR/CMD output setup with respect to MCK
tDDKHAS
ns
3
800 MHz
0.917
667 MHz
1.10
533 MHz
1.48
400 MHz
1.95
ADDR/CMD output hold with respect to MCK
tDDKHAX
ns
3
800 MHz
0.917
667 MHz
1.10
533 MHz
1.48
400 MHz
1.95
MCS[n] output setup with respect to MCK
tDDKHCS
ns
3
800 MHz
0.917
667 MHz
1.10
533 MHz
1.48
MCK[n]
tMCK
MDQ[x]
MDQS[n]
tDISKEW
D1
D0
tDISKEW
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