
MOTOROLA
Chapter 15. Memory Controller
15-17
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Register Descriptions
15.4.6 Memory Data Register (MDR)
The memory data register (MDR) contains data written to or read from the RAM array for
UPM READ or WRITE commands. MDR must be set up before issuing a WRITE command to
the MCR.
This register is not effected by HRESET or SRESET.
Table 15-8 describes MDR.
8
UM
User machine. Selects the UPM for this command.
0 UPMA
1 UPMB
9–15
—
Reserved, should be cleared.
16–18
MB
Memory bank. Indicates the appropriate CSx pin when a run command is executed (000
corresponds to CS0, 001 corresponds to CS1, …, 111 corresponds to CS7)
19
—
Reserved, should be cleared.
20–23
MCLF
Memory command loop eld. Species how many times a loop is executed for a RUN command.
(0001 = the loop executes once, 0010 = the loop executes twice, …, 1111 = the loop executes 15
times. Note that 0000 = the loop executes 16 times.)
24–25
—
Reserved, should be cleared.
26–31
MAD
Memory array index. Species an index to one of 64 RAM words in the RAM array.
0
15
Field
MD
Reset
xxxx_xxxx_xxxx_xxxx
R/W
Addr
(IMMR & FFFF0000) + 0x17C
16
31
Field
MD
Reset
xxxx_xxxx_xxxx_xxxx
R/W
Addr
(IMMR & FFFF0000) + 0x17E
Figure 15-12. Memory Data Register (MDR)
Table 15-8. MDR Field Descriptions
Bits
Name
Description
0–31
MD
Memory data. Contains the RAM array word.
Table 15-7. MCR Field Descriptions (continued)
Bits
Name
Description