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參數(shù)資料
| 型號： | MPC9229AC |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 400 MHz, OTHER CLOCK GENERATOR, PQFP32 |
| 封裝： | LEAD FREE, LQFP-32 |
| 文件頁數(shù)： | 11/12頁 |
| 文件大?。?/td> | 1359K |
| 代理商： | MPC9229AC |
MPC9229 REVISION 3 AUGUST 6, 2009
8
2009 Integrated Device Technology, Inc.
MPC9229 Data Sheet
400MHZ LOW VOLTAGE PECL CLOCK SYNTHESIZER
Figure 3. Serial Interface Timing Diagram
Power Supply Filtering
The MPC9229 is a mixed analog/digital product. Its analog
circuitry is naturally susceptible to random noise, especially if this
noise is seen on the power supply pins. Random noise on the
VCC_PLL pin impacts the device characteristics. The MPC9229
provides separate power supplies for the digital circuitry (VCC) and
the internal PLL (VCC_PLL) of the device. The purpose of this design
technique is to try and isolate the high switching noise digital outputs
from the relatively sensitive internal analog phase-locked loop. In a
controlled environment such as an evaluation board, this level of
isolation is sufficient. However, in a digital system environment
where it is more difficult to minimize noise on the power supplies a
second level of isolation may be required. The simplest form of
isolation is a power supply filter on the VCC_PLL pin for the
MPC9229. Figure 4. illustrates a typical power supply filter scheme.
The MPC9229 is most susceptible to noise with spectral content in
the 1 kHz to 1 MHz range. Therefore, the filter should be designed
to target this range. The key parameter that needs to be met in the
final filter design is the DC voltage drop that will be seen between the
VCC supply and the MPC9229 pin of the MPC9229. From the data
sheet the VCC_PLL current (the current sourced through the VCC_PLL
pin) is maximum 20 mA, assuming that a minimum of 2.835 V must
must have a resistance of 10-15
to meet the voltage drop criteria.
The RC filter pictured will provide a broadband filter with
approximately 100:1 attenuation for noise whose spectral content is
above 20 kHz. As the noise frequency crosses the series resonant
point of an individual capacitor its overall impedance begins to look
inductive and thus increases with increasing frequency. The parallel
capacitor combination shown ensures that a low impedance path to
ground exists for frequencies well above the bandwidth of the PLL.
Generally, the resistor/capacitor filter will be cheaper, easier to
implement and provide an adequate level of supply filtering. A higher
level of attenuation can be achieved by replacing the resistor with an
appropriate valued inductor. A 1000
H choke will show a significant
impedance at 10 kHz frequencies and above. Because of the
current draw and the voltage that must be maintained on the
VCC_PLL pin, a low DC resistance inductor is required (less than
15
).
Figure 4. VCC_PLL Power Supply Filter
Layout Recommendations
The MPC9229 provides sub-nanosecond output edge rates and
thus a good power supply bypassing scheme is a must. Figure 5.
shows a representative board layout for the MPC9229. There exists
many different potential board layouts and the one pictured is but
one. The important aspect of the layout in Figure 5. is the low
impedance connections between VCC and GND for the bypass
capacitors. Combining good quality general purpose chip capacitors
with good PCB layout techniques will produce effective capacitor
resonances at frequencies adequate to supply the instantaneous
switching current for the MPC9229 outputs. It is imperative that low
inductance chip capacitors are used; it is equally important that the
board layout does not introduce back all of the inductance saved by
using the leadless capacitors. Thin interconnect traces between the
capacitor and the power plane should be avoided and multiple large
vias should be used to tie the capacitors to the buried power planes.
Fat interconnect and large vias will help to minimize layout induced
inductance and thus maximize the series resonant point of the
bypass capacitors. Note the dotted lines circling the crystal oscillator
connection to the device. The oscillator is a series resonant circuit
and the voltage amplitude across the crystal is relatively small. It is
imperative that no actively switching signals cross under the crystal
as crosstalk energy coupled to these lines could significantly impact
the jitter of the device. Special attention should be paid to the layout
of the crystal to ensure a stable, jitter free interface between the
crystal and the on-board oscillator. Although the MPC9229 has
several design features to minimize the susceptibility to power
supply noise (isolated power and grounds and fully differential PLL),
there still may be applications in which overall performance is being
degraded due to system power supply noise. The power supply filter
and bypass schemes discussed in this section should be adequate
to eliminate power supply noise related problems in most designs.
T2
S_CLOCK
S_DATA
S_LOAD
M[8:0]
N[1:0]
P_LOAD
T1
T0
N1
N0
M8
M7
M6
M5
M4
M3
M2
M1
M0
M, N
First
Bit
Last
Bit
VCC_PLL
VCC
MPC9229
C1, C2 = 0.01...0.1 F
VCC
CF = 22 F
RF = 10-15
C2
C1
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MPC9229ACR2 | 功能描述:時鐘合成器/抖動清除器 FSL 400MHz LVPECL Freq. Synthesizer RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| MPC9229EI | 功能描述:時鐘合成器/抖動清除器 FSL 400MHz LVPECL Freq. Synthesizer RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| MPC9229EIR2 | 功能描述:時鐘合成器/抖動清除器 FSL 400MHz LVPECL Freq. Synthesizer RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| MPC9229FA | 功能描述:IC PECL CLOCK LV 400MHZ 32-LQFP RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時鐘 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:* |
| MPC9229FAR2 | 制造商:Integrated Device Technology Inc 功能描述:PLL Clock Synthesizer Single 32-Pin TQFP T/R |
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