
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Motorola, Inc. 2004
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by MPC9855
Preliminary Information
REV 0
This document contains information on a product under development. Motorola
reserves the right to change or discontinue this product without notice
Clock Generator for PowerQUICC and
PowerPC Microprocessors
The MPC9855 is a PLL based clock generator specifically designed for
Motorola Microprocessor and Microcontroller applications including the PowerPC
and PowerQUICC. This device generates a microprocessor input clock. The
microprocessor clock is selectable in output frequency to any of the commonly used
microprocessor input and bus frequencies. The device offers eight low skew clock
outputs in two banks, each configurable to support different clock frequencies. The
extended temperature range of the MPC9855 supports telecommunication and
networking requirements.
Features
8 LVCMOS outputs for processor and other circuitry
Crystal oscillator or external reference input
25 or 33 MHz Input reference frequency
Selectable output frequencies include = 200, 166, 133,125, 111, 100, 83, 66, 50,
33, or 16 MHz
Buffered reference clock output (2 copies)
Low cycle-to-cycle and period jitter
Package = 100 lead MAPBGA
3.3 V supply with 3.3 V or 2.5 V LVCMOS output supplies
Supports computing, networking, telecommunications applications
Ambient temperature range -40°C to +85°C
Functional Description
The MPC9855 uses either a 25 or 33 MHz reference frequency to generate 8 LVCMOS output clocks, of which, the frequency is
selectable from 16 MHz to 200 MHz. The reference is applied to the input of a PLL and multiplied to 2 GHz. Output dividers, divide
this frequency by 10, 12, 15, 16, 18, 20, 24, 30, 40, 60, or 120 to produce output frequencies of 200, 166, 133, 125, 111, 100, 83, 66,
50, 33, or 16 MHz. The single-ended LVCMOS outputs provide 8 low skew outputs for use in driving a microprocessor or
microcontroller clock input as well as other system components. The input reference, either crystal or external input is also buffered
to a separate dual outputs that my be used as the clock source for a Ethernet PHY if desired.
The reference clock may be provided by either an external clock input of 25 or 33 MHz. An internal oscillator requiring a 25 MHz
crystal for frequency control may also be used. The external clock source my be applied to either of two clock inputs and selected via
the CLK_SEL control input. Both single ended LVCMOS and differential LVPECL inputs are available. The crystal oscillator or
external clock input is selected via the input pin of XTAL_SEL. Other than the crystal, no external components are required for crystal
oscillator operation. The REF_33 MHz configuration pin is used to select between a 33 and 25 MHz input frequency.
The MPC9855 is packaged in a 100 lead MAPBGA package to optimize both performance and board density.
MPC9855
Microprocessor
Clock Generator
VF SUFFIX
100 MAPBGA PACKAGE
CASE 1462