參數(shù)資料
型號: MPS6560RL
廠商: ON SEMICONDUCTOR
元件分類: 小信號晶體管
英文描述: 500 mA, 25 V, NPN, Si, SMALL SIGNAL TRANSISTOR, TO-92
封裝: PLASTIC, TO-226AA, 3 PIN
文件頁數(shù): 8/33頁
文件大?。?/td> 294K
代理商: MPS6560RL
8–3
Package Outline Dimensions
Motorola Small–Signal Transistors, FETs and Diodes Device Data
PACKAGE OUTLINE DIMENSIONS (continued)
NOTES:
1. PACKAGE CONTOUR OPTIONAL WITHIN DIA B
AND LENGTH A. HEAT SLUGS, IF ANY, SHALL BE
INCLUDED WITHIN THIS CYLINDER, BUT SHALL
NOT BE SUBJECT TO THE MIN LIMIT OF DIA B.
2. LEAD DIA NOT CONTROLLED IN ZONES F, TO
ALLOW FOR FLASH, LEAD FINISH BUILDUP,
AND MINOR IRREGULARITIES OTHER THAN
HEAT SLUGS.
CASE 51–02
(DO–204AA)
DO–7
DIM
MIN
MAX
MIN
MAX
INCHES
MILLIMETERS
A
5.84
7.62
0.230
0.300
B
2.16
2.72
0.085
0.107
D
0.46
0.56
0.018
0.022
F
–––
1.27
–––
0.050
K
25.40
38.10
1.000
1.500
All JEDEC dimensions and notes apply.
K
A
D
B
F
K
F
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. CONTOUR OF PACKAGE BEYOND ZONE R IS
UNCONTROLLED.
4. DIMENSION F APPLIES BETWEEN P AND L.
DIMENSIONS D AND J APPLY BETWEEN L AND K
MINIMUM. LEAD DIMENSION IS UNCONTROLLED
IN P AND BEYOND DIM K MINIMUM.
CASE 182–02
PLASTIC
(T0–226AC) TO–92
A
L
K
B
R
F
P
D
H
G
XX
SEATING
PLANE
12
V
N
C
N
SECTION X–X
D
J
DIM
MIN
MAX
MIN
MAX
MILLIMETERS
INCHES
A
0.175
0.205
4.45
5.21
B
0.170
0.210
4.32
5.33
C
0.125
0.165
3.18
4.49
D
0.016
0.022
0.41
0.56
F
0.016
0.019
0.407
0.482
G
0.050 BSC
1.27 BSC
H
0.100 BSC
3.54 BSC
J
0.014
0.016
0.36
0.41
K
0.500
–––
12.70
–––
L
0.250
–––
6.35
–––
N
0.080
0.105
2.03
2.66
P
–––
0.050
–––
1.27
R
0.115
–––
2.93
–––
V
0.135
–––
3.43
–––
STYLE 1:
PIN 1. ANODE
2. CATHODE
相關(guān)PDF資料
PDF描述
MPS6560RLRA 500 mA, 25 V, NPN, Si, SMALL SIGNAL TRANSISTOR, TO-92
MPS6560RL1 500 mA, 25 V, NPN, Si, SMALL SIGNAL TRANSISTOR, TO-92
MPS6560RLRE 500 mA, 25 V, NPN, Si, SMALL SIGNAL TRANSISTOR, TO-92
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