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參數(shù)資料
| 型號(hào)： | MQ80C154-25/883 |
| 廠商： | TEMIC SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, 25 MHz, MICROCONTROLLER, CQFP44 |
| 文件頁數(shù)： | 12/80頁 |
| 文件大?。?/td> | 5152K |
| 代理商： | MQ80C154-25/883 |
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203
2466T–AVR–07/10
ATmega16(L)
When changing the ACIS1/ACIS0 bits, the Analog Comparator Interrupt must be disabled by
clearing its Interrupt Enable bit in the ACSR Register. Otherwise an interrupt can occur when the
bits are changed.
Analog
Comparator
Multiplexed Input
It is possible to select any of the ADC7..0 pins to replace the negative input to the Analog Com-
parator. The ADC multiplexer is used to select this input, and consequently, the ADC must be
switched off to utilize this feature. If the Analog Comparator Multiplexer Enable bit (ACME in
SFIOR) is set and the ADC is switched off (ADEN in ADCSRA is zero), MUX2..0 in ADMUX
select the input pin to replace the negative input to the Analog Comparator, as shown in Table
80. If ACME is cleared or ADEN is set, AIN1 is applied to the negative input to the Analog
Comparator.
Table 79. ACIS1/ACIS0 Settings
ACIS1
ACIS0
Interrupt Mode
0
Comparator Interrupt on Output Toggle
01
Reserved
1
0
Comparator Interrupt on Falling Output Edge
1
Comparator Interrupt on Rising Output Edge
Table 80. Analog Comparator Multiplexed Input
ACME
ADEN
MUX2..0
Analog Comparator Negative Input
0
x
xxx
AIN1
1
xxx
AIN1
1
0
000
ADC0
1
0
001
ADC1
1
0
010
ADC2
1
0
011
ADC3
1
0
100
ADC4
1
0
101
ADC5
1
0
110
ADC6
1
0
111
ADC7
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