參數(shù)資料
型號(hào)： MQ80C32-36/883R
廠商： TEMIC SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： 8-BIT, 36 MHz, MICROCONTROLLER, CQFP44
文件頁(yè)數(shù)： 8/28頁(yè)
文件大小： 6193K
代理商： MQ80C32-36/883R
16
2467X–AVR–06/11
ATmega128
When using the SEI instruction to enable interrupts, the instruction following SEI will be exe-
cuted before any pending interrupts, as shown in this example.
Interrupt Response
Time
The interrupt execution response for all the enabled AVR interrupts is four clock cycles mini-
mum. After four clock cycles, the program vector address for the actual interrupt handling routine
is executed. During this 4-clock cycle period, the Program Counter is pushed onto the Stack.
The vector is normally a jump to the interrupt routine, and this jump takes three clock cycles. If
an interrupt occurs during execution of a multi-cycle instruction, this instruction is completed
before the interrupt is served. If an interrupt occurs when the MCU is in Sleep mode, the inter-
rupt execution response time is increased by four clock cycles. This increase comes in addition
to the start-up time from the selected sleep mode.
A return from an interrupt handling routine takes four clock cycles. During these 4-clock cycles,
the Program Counter (two bytes) is popped back from the Stack, the Stack Pointer is incre-
mented by two, and the I-bit in SREG is set.
Assembly Code Example
sei
; set global interrupt enable
sleep
; enter sleep, waiting for interrupt
; note: will enter sleep before any pending
; interrupt(s)
C Code Example
__enable_interrupt(); /* set global interrupt enable */
__sleep(); /* enter sleep, waiting for interrupt */
/* note: will enter sleep before any pending interrupt(s) */
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