參數(shù)資料
型號: MQ80C52TXXX-30/883
廠商: ATMEL CORP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 30 MHz, MICROCONTROLLER, CQFP44
封裝: CERAMIC, QFP-44
文件頁數(shù): 8/32頁
文件大?。?/td> 3152K
代理商: MQ80C52TXXX-30/883
15
7707F–AVR–11/10
AT90USB82/162
4.8.1
Interrupt Response Time
The interrupt execution response for all the enabled AVR interrupts is five clock cycles minimum.
After five clock cycles the program vector address for the actual interrupt handling routine is exe-
cuted. During these five clock cycle period, the Program Counter is pushed onto the Stack. The
vector is normally a jump to the interrupt routine, and this jump takes three clock cycles. If an
interrupt occurs during execution of a multi-cycle instruction, this instruction is completed before
the interrupt is served. If an interrupt occurs when the MCU is in sleep mode, the interrupt exe-
cution response time is increased by five clock cycles. This increase comes in addition to the
start-up time from the selected sleep mode.
A return from an interrupt handling routine takes three clock cycles. During these three clock
cycles, the Program Counter (three bytes) is popped back from the Stack, the Stack Pointer is
incremented by three, and the I-bit in SREG is set.
Assembly Code Example
sei
; set Global Interrupt Enable
sleep
; enter sleep, waiting for interrupt
; note: will enter sleep before any pending
; interrupt(s)
C Code Example
__enable_interrupt(); /* set Global Interrupt Enable */
__sleep(); /* enter sleep, waiting for interrupt */
/* note: will enter sleep before any pending interrupt(s) */
相關(guān)PDF資料
PDF描述
MR80C52EXXX-16/883:RD 8-BIT, MROM, 16 MHz, MICROCONTROLLER, CQCC44
MR80C52EXXX-36:D 8-BIT, MROM, 36 MHz, MICROCONTROLLER, CQCC44
MQ80C52EXXX-20SHXXX 8-BIT, MROM, 20 MHz, MICROCONTROLLER, CQFP44
MR80C52XXX-36/883:RD 8-BIT, MROM, 36 MHz, MICROCONTROLLER, CQCC44
MC80C52EXXX-36:D 8-BIT, MROM, 36 MHz, MICROCONTROLLER, CDIP40
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