419
XMEGA A [MANUAL]
8077I–AVR–11/2012
34.5
8077E – 01/2009
34.6
8077D – 12/2008
1.
2.
3.
4.
1.
Updated the front page.
2.
Updated Feature list in ”Memories” on page 18.
3.
Updated ”Production Signature Row” on page 20 and inserted ”User Signature Row” on page 20.
4.
Added Signtaure Row register description in Memory section, updated signature row summary with byte addresses.
5.
Updated ”MCUCR – MCU Control Register” on page 44.
6
Updated lication of BODACT fuse bits in FUSEBYTE5 in Section 4.22 ”Register Summary - Fuses and Lockbits” on
page 46.
7.
Updated ”Interrupt Vector Summary - NVM Controller” on page 48.
8.
Updated ”Priority Between Channels” on page 51.
9.
Updated Overview in ”Event System” on page 65.
10.
Updated ”Manually Generating Events” on page 67 and ”Event Routing Network” on page 67.
11.
Updated ”Quadrature Decoder (QDEC)” on page 69.
12.
Inserted a new section ”Battery Backup System” on page 111.
13.
Updated title of the Table 13-7 on page 145: Event Channel 0 Output Configurations.
14.
Updated Figure 13-1 ”General I/O pin functionality.” on page 130.
15.
Updated Table 13-7 ”Event Channel 0 output configurations” on page 145.
16.
Updated Figure 13-10 ”Port override signals and related logic” on page 137.
17.
Added RTC section ”Interrupts and events” on page 190.
18.
Updated ”Capture Channel” on page 156.
19.
Updated ”Frequency Capture” on page 157.
20.
Updated ”CTRLE - Control Register E” on page 167, ”Register Summary” on page 174 and ”TC - 16-bit
Timer/Counter” on page 379 by removing DTHM-bit register.
21.
Updated RTC32 ”O(jiān)verview” on page 196.
22.
Inserted a new section ”RTC32 - 32-bit Real Time Counter” on page 196.
23.
Updated ”STATUS– TWI Slave Status Register” on page 223, (Bit 7- DIF and Bit 6 - APIF).
24.
Updated ”IRCOM Mode of Operation” on page 248.
25.
Updated ”CTRLB - USART Control Register B” on page 250 (Bit 2).