參數(shù)資料
型號: MQ80C52XXX-36SHXXX
廠商: ATMEL CORP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 36 MHz, MICROCONTROLLER, CQFP44
封裝: CERAMIC, QFP-44
文件頁數(shù): 25/132頁
文件大?。?/td> 10886K
代理商: MQ80C52XXX-36SHXXX
194
ATmega8535(L)
2502K–AVR–10/06
Figure 89. Formats and States in the Master Receiver Mode
Slave Receiver Mode
In the Slave Receiver mode, a number of data bytes are received from a Master Trans-
mitter (see Figure 90). All the status codes mentioned in this section assume that the
prescaler bits are zero or are masked to zero.
Figure 90. Data Transfer in Slave Receiver Mode
S
SLA
R
A
DATA
A
$08
$40
$50
SLA
R
$10
AP
$48
A or A
$38
Other master
continues
$38
Other master
continues
W
A
$68
Other master
continues
$78
$B0
To corresponding
states in slave mode
MR
MT
Successfull
reception
from a slave
receiver
Next transfer
started with a
repeated start
condition
Not acknowledge
received after the
slave address
Arbitration lost in slave
address or data byte
Arbitration lost and
addressed as slave
DATA
A
n
From master to slave
From slave to master
Any number of data bytes
and their associated acknowledge bits
This number (contained in TWSR) corresponds
to a defined state of the Two-wire Serial Bus. The
prescaler bits are zero or masked to zero
P
DATA
A
$58
A
RS
Device 3
Device n
SDA
SCL
........
R1
R2
V
CC
Device 2
MASTER
TRANSMITTER
Device 1
SLAVE
RECEIVER
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