
177
2588F–AVR–06/2013
ATtiny261/461/861
Figure 18-2. Serial Programming Instruction example
If the LSB in RDY/BSY data byte out is ‘1’, a programming operation is still pending. Wait until
this bit returns ‘0’ before the next instruction is carried out.
Within the same page, the low data byte must be loaded prior to the high data byte.
18.7
Parallel Programming
This section describes how to parallel program and verify Flash Program memory, EEPROM
Data memory, Memory Lock bits, and Fuse bits. Pulses are assumed to be at least 250 ns in
length, unless otherwise noted.
18.7.1
Signal Names
In this section, some pins are referenced by signal names describing their functionality during
are referenced by pin names.
Byte 1
Byte 2
Byte 3
Byte 4
Adr LSB
Bit 15 B
0
Serial Programming Instruction
Program Memory/
EEPROM Memory
Page 0
Page 1
Page 2
Page N-1
Page Buffer
Write Program Memory Page/
Write EEPROM Memory Page
Load Program Memory Page (High/Low Byte)/
Load EEPROM Memory Page (page access)
Byte 1
Byte 2
Byte 3
Byte 4
Bit 15 B
0
Adr MSB
Page Offset
Page Number
Adr
dr M
r MS
SB
A
Adr
dr LS
LSB
SB