25
XMEGA D3 [DATASHEET]
Atmel-8134N-ATxmega32D3-64D3-128D3-192D3-256D3-384D3_datasheet–03/2014
11.4
Reset sources
11.4.1 Power-on reset
A power-on reset (POR) is generated by an on-chip detection circuit. The POR is activated when the V
CC rises and
reaches the POR threshold voltage (V
POT), and this will start the reset sequence.
The POR is also activated to power down the device properly when the V
CC falls and drops below the VPOT level.
The V
POT level is higher for falling VCC than for rising VCC. Consult the datasheet for POR characteristics data.
11.4.2 Brownout detection
The on-chip brownout detection (BOD) circuit monitors the V
CC level during operation by comparing it to a fixed,
programmable level that is selected by the BODLEVEL fuses. If disabled, BOD is forced on at the lowest level during chip
erase and when the PDI is enabled.
11.4.3 External reset
The external reset circuit is connected to the external RESET pin. The external reset will trigger when the RESET pin is
driven below the RESET pin threshold voltage, V
RST, for longer than the minimum pulse period, tEXT. The reset will be
held as long as the pin is kept low. The RESET pin includes an internal pull-up resistor.
11.4.4 Watchdog reset
The watchdog timer (WDT) is a system function for monitoring correct program operation. If the WDT is not reset from
the software within a programmable timeout period, a watchdog reset will be given. The watchdog reset is active for one
11.4.5 Software reset
The software reset makes it possible to issue a system reset from software by writing to the software reset bit in the reset
control register.The reset will be issued within two CPU clock cycles after writing the bit. It is not possible to execute any
instruction from when a software reset is requested until it is issued.
11.4.6 Program and debug interface reset
The program and debug interface reset contains a separate reset source that is used to reset the device during external
programming and debugging. This reset source is accessible only from external debuggers and programmers.