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| 型號(hào)： | MR80C32-36:D |
| 廠商： | TEMIC SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, 36 MHz, MICROCONTROLLER, CQCC44 |
| 文件頁(yè)數(shù)： | 73/91頁(yè) |
| 文件大?。?/td> | 19688K |
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417
XMEGA A [MANUAL]
8077I–AVR–11/2012
34.
Datasheet Revision History
Please note that the referring page numbers in this section are referring to this document. The referring revision in this
section are referring to the document revision.
34.1
8077I – 11/2012
34.2
8077H – 12/2009
1.
Updated module descriptions and graphics. Based on the XMEGA AU manual.
2.
References to Calibration Row updated to Production Signature Row for consistency.
3.
Added information on consequences of leaving some fuses unprogrammed in “Fuses and Lock bits” on page 21.
4.
Corrected address from 0x04 to 0x0F in “STATUS – Status register” on page 28.
5.
Updated initial values of “FUSEBYTE0 – Fuse Byte 0” on page 29.
6.
Corrected register addresses in “Register Description – Production Signature Row” on page 35.
7.
Added reference to “NVM Flash Commands” on page 358 in “Production Signature Row” on page 21.
8.
Removed “+” from register addresses in “Register Description – Production Signature Row” on page 35.
9.
Read/Write updated on bit 3 in “ADDRCTRL – Address Control register” on page 58.
10.
Initial value of bit 1 in “TRFCNTL – Channel Block Transfer Count register Low” on page 62 changed from 0 to 1.
11.
Updated step 6.6 and 6.7 under in the “QDEC Setup” on page 73.
12.
Updated “32kHz Ultra Low Power Oscillator” on page 81 and “32.768kHz Calibrated Oscillator” on page 81 by
adding reference to “RTCCTRL – RTC Control register” on page 89 for more details on prescaling.
13.
Added “On-chip Debug System” as a sub section to “Minimizing Power Consumption” on page 101.
14.
Updated description of “Bit 2 – RTC: Real-Time Counter” on page 103.
15.
BODLEVEL settings updated in Table 9-2 on page 109.
16.
Updated figures in “Input Sense Configuration” on page 136.
17.
Updated description of “Bit 5 – PGM: Pattern Generation Mode” on page 181.
18.
19.
Updated description of “Address Latches” on page 266.
20.
Updated description in “TAP - Test Access Port” on page 331.
21.
Updated EBI timing diagrams in “LPC 2- Port ALE12 no CS” on page 395.
1.
2.
Removed Spike detector from XMEGA A Manual
3.
Removed Table 4-9 on page 34.
4.
5.
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