21
8008H–AVR–04/11
ATtiny48/88
before writing to them. This can be done at times when the system allows time-critical
operations, typically at start-up and initialisation.
The programming method is selected using the EEPROM Programming Mode bits (EEPM1 and
times are given in the same table.
Since EEPROM programming takes some time the application must wait for one operation to
complete before starting the next. This can be done by either polling the EEPROM Program
Enable bit (EEPE) in EEPROM Control Register (EECR), or via the EEPROM Ready Interrupt.
The EEPROM interrupt is controlled by the EEPROM Ready Interrupt Enable (EERIE) bit in
EECR.
5.3.2
Read
To read an EEPROM memory location follow the procedure below:
Poll the EEPROM Program Enable bit (EEPE) in EEPROM Control Register (EECR) to make
sure no other EEPROM operations are in process. If set, wait to clear.
Write target address to EEPROM Address Registers (EEARH/EEARL).
Start the read operation by setting the EEPROM Read Enable bit (EERE) in the EEPROM
Control Register (EECR). During the read operation, the CPU is halted for four clock cycles
before executing the next instruction.
Read data from the EEPROM Data Register (EEDR).
5.3.3
Erase
In order to prevent unintentional EEPROM writes, a specific procedure must be followed to
erase memory locations. To erase an EEPROM memory location follow the procedure below:
Poll the EEPROM Program Enable bit (EEPE) in EEPROM Control Register (EECR) to make
sure no other EEPROM operations are in process. If set, wait to clear.
Set mode of programming to erase by writing EEPROM Programming Mode bits (EEPM0
and EEPM1) in EEPROM Control Register (EECR).
Write target address to EEPROM Address Registers (EEARH/EEARL).
Enable erase by setting EEPROM Master Program Enable (EEMPE) in EEPROM Control
Register (EECR). Within four clock cycles, start the erase operation by setting the EEPROM
Program Enable bit (EEPE) in the EEPROM Control Register (EECR). During the erase
operation, the CPU is halted for two clock cycles before executing the next instruction.
The EEPE bit remains set until the erase operation has completed. While the device is busy pro-
gramming, it is not possible to perform any other EEPROM operations.
5.3.4
Write
In order to prevent unintentional EEPROM writes, a specific procedure must be followed to write
to memory locations.
Before writing data to EEPROM the target location must be erased. This can be done either in
the same operation or as part of a split operation. Writing to an unerased EEPROM location will
result in corrupted data.