- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄25642 > MR80C52TXXX-20SHXXX:R (ATMEL CORP) 8-BIT, MROM, 20 MHz, MICROCONTROLLER, CQCC44 PDF資料下載
參數(shù)資料
| 型號(hào)： | MR80C52TXXX-20SHXXX:R |
| 廠商： | ATMEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 20 MHz, MICROCONTROLLER, CQCC44 |
| 封裝： | LCC-44 |
| 文件頁(yè)數(shù)： | 41/91頁(yè) |
| 文件大?。?/td> | 19688K |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)當(dāng)前第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)
36
7707F–AVR–11/10
AT90USB82/162
“0011”, giving a division factor of 8 at start up. This feature should be used if the selected clock
source has a higher frequency than the maximum frequency of the device at the present operat-
ing conditions. Note that any value can be written to the CLKPS bits regardless of the CKDIV8
Fuse setting. The Application software must ensure that a sufficient division factor is chosen if
the selected clock source has a higher frequency than the maximum frequency of the device at
the present operating conditions. The device is shipped with the CKDIV8 Fuse programmed.
6.9
PLL
The PLL is used to generate internal high frequency (48 MHz) clock for USB interface, the PLL
input is generated from an external low-frequency (the crystal oscillator or external clock input
pin from XTAL1).
6.9.1
Internal PLL for USB interface
The internal PLL in AT90USB82/162 generates a clock frequency that is 6x multiplied from nom-
inally 8 MHz input. The source of the 8 MHz PLL input clock is the output of the internal PLL
clock prescaler that generates the 8 MHz.
Table 6-9.
Clock Prescaler Select
CLKPS3
CLKPS2
CLKPS1
CLKPS0
Clock Division Factor
00
1
00
01
2
00
10
4
00
11
8
01
00
16
01
32
01
10
64
01
11
128
10
00
256
10
01
Reserved
10
Reserved
10
11
Reserved
11
00
Reserved
11
01
Reserved
11
10
Reserved
11
Reserved
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MR80C52XXX-36/883:RD | 8-BIT, MROM, 36 MHz, MICROCONTROLLER, CQCC44 |
| MD83C154TXXX-20P883 | 8-BIT, MROM, 20 MHz, MICROCONTROLLER, CDIP40 |
| MR80C52EXXX-36SHXXX:D | 8-BIT, MROM, 36 MHz, MICROCONTROLLER, CQCC44 |
| MR83C154CXXX-12/883 | 8-BIT, MROM, 12 MHz, MICROCONTROLLER, CQCC44 |
| MR83C154XXX-12/883 | 8-BIT, MROM, 12 MHz, MICROCONTROLLER, CQCC44 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MR80C86 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:CMOS 16-Bit Microprocessor |
| MR80C86/B | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Harris Corporation 功能描述:Microprocessor, 16 Bit, 44 Pin, Ceramic, LCC |
| MR80C86-2 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:CMOS 16-Bit Microprocessor |
| MR80C86-2/883 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MR80C86-2/B | 制造商:Intersil Corporation 功能描述:MPU 80C86 16BIT CMOS 8MHZ 44PLCC - Rail/Tube |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。