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參數(shù)資料
| 型號： | MR82C54-10/B |
| 廠商： | INTERSIL CORP |
| 元件分類： | 時鐘/數(shù)據(jù)恢復(fù)及定時提取 |
| 英文描述： | 3 TIMER(S), PROGRAMMABLE TIMER, CQCC28 |
| 封裝： | CERAMIC, LCC-28 |
| 文件頁數(shù)： | 18/19頁 |
| 文件大?。?/td> | 380K |
| 代理商： | MR82C54-10/B |
8
NULL COUNT bit D6 indicates when the last count written to
the counter register (CR) has been loaded into the counting
element (CE). The exact time this happens depends on the
Mode of the counter and is described in the Mode Definitions,
but until the counter is loaded into the counting element (CE),
it can’t be read from the counter. If the count is latched or read
before this time, the count value will not reflect the new count
just written. The operation of Null Count is shown below.
THIS ACTION:
CAUSES:
A. Write to the control word register:(1) . . . . . . . . . . Null Count = 1
B. Write to the count register (CR):(2) . . . . . . . . . . . Null Count = 1
C. New count is loaded into CE (CR - CE). . . . . . . . Null Count = 0
(1) Only the counter specified by the control word will have its null
count set to 1. Null count bits of other counters are unaffected.
(2) If the counter is programmed for two-byte counts (least signifi-
cant byte then most significant byte) null count goes to 1 when
the second byte is written.
If multiple status latch operations of the counter(s) are per-
formed without reading the status, all but the first are ignored;
i.e., the status that will be read is the status of the counter at
the time the first status read-back command was issued.
FIGURE 7. READ-BACK COMMAND EXAMPLE
D7
D6
D5
D4
D3
D2
D1
D0
OUTPUT
NULL
COUNT
RW1 RW0
M2
M1
M0
BCD
D7: 1
= Out pin is 1
0
= Out pin is 0
D6: 1
= Null count
0
= Count available for reading
D5 - D0 = Counter programmed mode (See Control Word Formats)
FIGURE 6. STATUS BYTE
COMMANDS
DESCRIPTION
RESULT
D7
D6
D5
D4
D3
D2
D1
D0
1
0
1
0
Read-Back Count and Status of Counter 0
Count and Status Latched for Counter 0
1
0
1
0
Read-Back Status of Counter 1
Status Latched for Counter 1
1
0
1
0
Read-Back Status of Counters 2, 1
Status Latched for Counter 2,
But Not Counter 1
1
0
1
0
Read-Back Count of Counter 2
Count Latched for Counter 2
1
0
1
0
Read-Back Count and Status of Counter 1
Count Latched for Counter 1,
But Not Status
1
0
1
0
Read-Back Status of Counter 1
Command Ignored, Status Already
Latched for Counter 1
82C54
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MR82C54-12/B | 3 TIMER(S), PROGRAMMABLE TIMER, CQCC28 |
| MD82C54-10/B | 3 TIMER(S), PROGRAMMABLE TIMER, CDIP24 |
| MD82C54-12/B | 3 TIMER(S), PROGRAMMABLE TIMER, CDIP24 |
| MR82C54/883 | 3 TIMER(S), PROGRAMMABLE TIMER, CQCC28 |
| MD82C54/883 | 3 TIMER(S), PROGRAMMABLE TIMER, CDIP24 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MR82C54-12 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:CMOS Programmable Interval Timer |
| MR82C54-12B | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:CMOS Programmable Interval Timer |
| MR82C54B | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:CMOS Programmable Interval Timer |
| MR82C55A | 制造商:HARRIS 制造商全稱:HARRIS 功能描述:CMOS Programmable Peripheral Interface |
| MR82C55A-5 | 制造商:HARRIS 制造商全稱:HARRIS 功能描述:CMOS Programmable Peripheral Interface |
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