178
2588F–AVR–06/2013
ATtiny261/461/861
Figure 18-3. Parallel Programming.
Table 18-12. Pin Name Mapping
Signal Name in
Programming Mode
Pin
Name
I/O
Function
WR
PB0
I
Write Pulse (Active low).
XA0
PB1
I
XTAL Action Bit 0
XA1/BS2
PB2
I
XTAL Action Bit 1. Byte Select 2 (“0” selects low byte, “1”
selects 2’nd high byte).
PAGEL/BS1
PB3
I
Byte Select 1 (“0” selects low byte, “1” selects high byte).
Program Memory and EEPROM Data Page Load.
OE
PB5
I
Output Enable (Active low).
RDY/BSY
PB6
O
0: Device is busy programming, 1: Device is ready for new
command.
DATA I/O
PA7-PA0
I/O
Bi-directional Data bus (Output when OE is low).
VCC
+5V
GND
XTAL1/PB4
PB6
PB5
PB0
PB3
PB1
PB2
PA7 - PA0
DATA
RESET
+12 V
PAGEL/BS1
XA0
XA1/BS2
OE
RDY/BSY
WR
AVCC
+5V