參數(shù)資料
型號: MRT100KP60CATR
廠商: MICROSEMI CORP-IRELAND
元件分類: TVS二極管 - 瞬態(tài)電壓抑制
英文描述: 100000 W, BIDIRECTIONAL, SILICON, TVS DIODE
封裝: PLASTIC, CASE 5A, 2 PIN
文件頁數(shù): 4/5頁
文件大?。?/td> 260K
代理商: MRT100KP60CATR
TECHNICAL DATA SHEET
Gort Road Business Park, Ennis, Co. Clare, Ireland.
6 Lake Street, Lawrence, MA 01841
Tel: +353 (0) 65 6840044, Fax: +353 (0) 65 6822298
Tel: 1-800-446-1158 / (978) 794-1666, Fax: (978) 6890803
Website: http://www.microsemi.com
___________________________________________________________________________________________________________________________________
RF01012 Rev A, August 2010
High Reliability Product Group
Page 4 of 5
GRAPHS
Correct
Incorrect
FIGURE 3
FIGURE 5
FIGURE 4
FIGURE 6
NOTE: This PPP versus time graph allows the designer to use these parts over a broad
power spectrum using the guidelines illustrated in MicroNote 104 on
www.microsemi.com. Aircraft transients are described with exponential decaying
waveforms. For suppression of square-wave impulses, derate power and current to
66% of that for exponential decay shown in Figure 1.
P
PP
P
e
a
k
P
u
ls
e
P
o
w
e
r
v
s
.
P
u
ls
e
T
im
e
kW
N
o
n
-R
e
p
e
tit
iv
e
P
u
ls
e
tp
– Pulse Time – sec.
FIGURE 1
Peak Pulse Power vs. Pulse Time
To 50% of Exponentially Decaying Pulse
Pe
ak
Pu
ls
e
Po
w
er
(P
PP
)o
rc
on
tin
uo
us
Po
w
er
in
%
o
f2
5o
C
ra
tin
g
TL Lead Temperature oC
FIGURE 2
POWER DERATING
INSTALLATION
TVS devices used across power lines are
subject to relatively high magnitude surge
currents and are more prone to adverse
parasitic
inductance
effects
in
the
mounting leads.
Minimizing the shunt
path of the lead inductance and their
V = -Ldi/dt effects will optimize the TVS
effectiveness.
Examples of optimum
installation
and
poor
installation
are
illustrated in Figures 3 to 6.
Figure 3
illustrates minimal parasitic inductance
with
attachment
at
end
of
device.
Inductive voltage drop is across input
leads.
Virtually no “overshoot” voltage
results as illustrated with Figure 4. The
loss of effectiveness in protection caused
by
excessive
parasitic
inductance
is
illustrated in Figures 5 and 6. Also see
MicroNote 111 for further information on
“Parasitic Lead Inductance in TVS”.
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