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參數(shù)資料
| 型號： | MS7201AL |
| 廠商： | Mosel Vitelic, Corp. |
| 英文描述： | Dual-port Static RAM Based CMOS First-In/First-Out (FIFO) Memories Organized(基于雙端口靜態(tài)RAM的CMOS先進(jìn)先出存儲(chǔ)器) |
| 中文描述： | 雙端口靜態(tài)存儲(chǔ)器的CMOS先進(jìn)先出（FIFO）的記憶有組織（基于雙端口靜態(tài)RAM的的的CMOS先進(jìn)先出存儲(chǔ)器） |
| 文件頁數(shù)： | 1/11頁 |
| 文件大?。?/td> | 80K |
| 代理商： | MS7201AL |
1
MS7200L/7201AL/7202AL
MOSEL V ITELIC
MS7200L/01AL/02AL Rev. 1.0 January 1995
MS7200L/7201AL/7202AL
256 x 9, 512 x 9, 1K x 9
CMOS FIFO
Features
I
First-In/First-Out static RAM based dual port
memory
I
Three densities in a x9 configuration
I
Low power versions
I
Includes empty, full, and half full status flags
I
Direct replacement for industry standard
Mostek and IDT
I
Ultra high-speed 30 MHz FIFOs available with
33 ns cycle times.
I
Fully expandable in both depth and width
I
Simultaneous and asynchronous read and write
I
Auto retransmit capability
I
TTL compatible interface, single 5V ± 10%
power supply
I
Available in 28 pin 300 mil and 600 mil plastic
DIP, 32 Pin PLCC and 330 mil SOG
Descriptions
The MS7200L/7201AL/7202AL are dual-port
static RAM based CMOS First-In/First-Out (FIFO)
memories organized in nine-bit wide words. The
devices are configured so that data is read out in
the same sequential order that it was written in.
Additional expansion logic is provided to allow for
unlimited expansion of both word size and depth.
The dual-port RAM array is internally sequenced
by independent Read and Write pointers with no
external addressing needed. Read and write
operations are fully asynchronous and may occur
simultaneously, even with the device operating at
full speed. Status flags are provided for full, empty,
and half-full conditions to eliminate data underflow
and overflow. The x9 architecture provides an
additional bit which may be used as a parity or
control bit. In addition, the devices offer a retransmit
capability which resets the Read pointer and allows
for retransmission from the beginning of the data.
The MS7200L/7201AL/7202AL are available in a
range of frequencies from 10 to 30 MHz (33 - 100 ns
cycle times). A low power version with a 500μA
power down supply current is available. They are
manufactured on Mosel-Vitelic’s high performance
1.2μ CMOS process and operate from a single 5V
power supply.
W
CWRITE
WRITE
PREAD
CREAD
LOGIC
FLAG
EXLOGIC
STATE
BUFFERS
DATA OUTPUTS (Q0-Q8)
DATA INPUTS (Q0-Q8)
R
XI
EF
HF
FF
XO
RS
FL / RT
256x9
1Kx9
Block Diagram
28-PIN PDIP
Pin Configurations
32-PIN PLCC
V
D6
D7
FL / RT
EF
XO / HF
CC
Q2
Q3
Q8
GND
Q1
Q0
FF
XI
D0
D1
D2
D3
D8
3DIP
33&
SOG
W
Q6
Q5
Q4
R
Q7
RS
D5
D4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
D
D
XI
FF
Q
Q
NC
Q
D6
D7
NC
FL / RT
RS
EF
XO / HF
Q7
Q6
5
8
7
8
9
10
11
14
13
29
28
27
26
25
24
23
22
21
D
D
W
N
V
D
D
1
0
0
1
2
14
Q
V
N
R
Q
Q
D2
Q
3Top View
15 16 17 18 19 20
4
3
2
1 32 31 30
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PDF描述 |
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| MS7202AL | Dual-port Static RAM Based CMOS First-In/First-Out (FIFO) Memories Organized(基于雙端口靜態(tài)RAM的CMOS先進(jìn)先出存儲(chǔ)器) |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MS7202-A2 | 制造商:INTERSEMA 制造商全稱:INTERSEMA 功能描述:PRESSURE SENSOR DIE (0-2 BAR) FOR HARSH ENVIRONMENT |
| MS7202AL | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:256 x 9, 512 x 9, 1K x 9 CMOS FIFO |
| MS720435PC | 制造商:MOSELE 功能描述: |
| MS7204-A2 | 制造商:INTERSEMA 制造商全稱:INTERSEMA 功能描述:PRESSURE SENSOR DIE (0-4 BAR) FOR HARSH ENVIRONMENT |
| MS7207-A2 | 制造商:INTERSEMA 制造商全稱:INTERSEMA 功能描述:PRESSURE SENSOR DIE (0-7 BAR) FOR HARSH ENVIRONMENT |
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