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參數(shù)資料
| 型號： | MS80C51C-36R |
| 廠商： | TEMIC SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 36 MHz, MICROCONTROLLER, PQCC44 |
| 文件頁數(shù)： | 158/170頁 |
| 文件大小： | 4133K |
| 代理商： | MS80C51C-36R |
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88
ATtiny4/5/9/10 [DATASHEET]
8127F–AVR–02/2013
be generated when the ADC conversion completes. The CPU will remain in active mode until a new sleep
command is executed.
Note that the ADC will not be automatically turned off when entering other sleep modes than Idle mode and ADC
Noise Reduction mode. The user is advised to write zero to ADEN before entering such sleep modes to avoid
excessive power consumption.
13.8
Analog Input Circuitry
The analog input circuitry for single ended channels is illustrated in Figure 13-8 An analog source applied to ADCn
is subjected to the pin capacitance and input leakage of that pin, regardless of whether that channel is selected as
input for the ADC. When the channel is selected, the source must drive the S/H (sample and hold) capacitor
through the series resistance (combined resistance in the input path).
Figure 13-8. Analog Input Circuitry
The capacitor in Figure 13-8 depicts the total capacitance, including the sample/hold capacitor and any stray or
parasitic capacitance inside the device. The value given is worst case.
The ADC is optimized for analog signals with an output impedance of approximately 10 k
, or less. With such
sources, the sampling time will be negligible. If a source with higher impedance is used, the sampling time will
depend on how long time the source needs to charge the S/H capacitor. This can vary widely. The user is recom-
mended to only use low impedance sources with slowly varying signals, since this minimizes the required charge
transfer to the S/H capacitor.
Signal components higher than the Nyquist frequency (f
ADC/2) should not be present to avoid distortion from unpre-
dictable signal convolution. The user is advised to remove high frequency components with a low-pass filter before
applying the signals as inputs to the ADC.
13.9
Noise Canceling Techniques
Digital circuitry inside and outside the device generates EMI which might affect the accuracy of analog measure-
ments. When conversion accuracy is critical, the noise level can be reduced by applying the following techniques:
Keep analog signal paths as short as possible.
Make sure analog tracks run over the analog ground plane.
Keep analog tracks well away from high-speed switching digital tracks.
If any port pin is used as a digital output, it mustn’t switch while a conversion is in progress.
Place bypass capacitors as close to V
CC and GND pins as possible.
ADCn
IIH
1..100 k
ohm
CS/H= 14 pF
VCC/2
IIL
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