參數(shù)資料
型號: MSC1212Y5PAGR
廠商: Texas Instruments, Inc.
英文描述: Precision Analog-to-Digital Converter (ADC) and Digital-to-Analog Converters (DACs) with 8051 Microcontroller and Flash Memory
中文描述: 精密模擬到數(shù)字轉(zhuǎn)換器(ADC)和數(shù)字到模擬轉(zhuǎn)換器(DAC)的8051微控制器和閃存
文件頁數(shù): 5/11頁
文件大?。?/td> 99K
代理商: MSC1212Y5PAGR
Semiconductor
MSC1212-01
5/11
PIN DESCRIPTION
Pin
1 to 17
32 to 48
50 to 63
19, 30
27
20, 29
21
22
23
24
25
26
Symbol
HVO1
to
HVO48
V
DISP
V
CC
D-GND
L-GND
DIN
CLK
LS
CL
CHG
Function
Driver Output
Driver Power Supply
Logic Power Supply
Driver GND
Logic GND
Data Input
Clock Input
Latch Strobe Input
Clear Input
Test Input
Description
Driver output pins, applicable to each bit of shift
register.
Power supply pins for driver circuit. Both Pin 19
and 30 should be connected externally.
Power supply pin for logic.
GND pins for the driver circuit.
Both Pin 20 and 29 should be connected externally.
GND pin for the logic circuit.
Input pin without pull-up or pull-down resistor.
Input pin of shift register. Display data input is
synchronized with clock signal. (positive logic)
Input pin without pull-up or pull-down resistor.
Data of shift register is shifted from one stage to
the next on application of each clock rising edge.
Input pin without pull-up or pull-down resistor.
When LS is at "H" level, the latch is shunted and the
shift register output becomes the lacth output.
When LS is at "L" level, the lacth holds the shift
register output just bafore LS goes to "L" level.
Clear input pin with pull-up resistor. Normally "L"
level. In this condition, driver output changes to "H"
or "L" according to latch output level. When CL is
"H", all driver output pins are fixed to "L".
Test input pin with pull-down resistor. Normally "L"
level, but here, if CL="H", then driver output changes
to "H" or "L" according to latch output level.
If CL = "L" when CHG is at "H" level, all driver output
is fixed to "H" for test.
Serial output pin of shift register.
28
DOUT
Data Output
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