Figure 24 shows the signal behavior of the
參數(shù)資料
型號: MSC7113VF1000
廠商: Freescale Semiconductor
文件頁數(shù): 32/60頁
文件大?。?/td> 0K
描述: DSP 16BIT W/DDR CTRLR 400-MAPBGA
標準包裝: 90
系列: StarCore
類型: SC1400 內核
接口: 主機接口,I²C,UART
時鐘速率: 266MHz
非易失內存: 外部
芯片上RAM: 208kB
電壓 - 輸入/輸出: 3.30V
電壓 - 核心: 1.20V
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 400-LFBGA
供應商設備封裝: 400-MAPBGA(17x17)
包裝: 托盤
MSC7113 Data Sheet, Rev. 11
Freescale Semiconductor
38
2.5.11
Event Timing
Figure 24 shows the signal behavior of the EVNT pin.
2.5.12
GPIO Timing
Figure 25 shows the signal behavior of the GPI/GPO pin.
Table 29. EVNT Signal Timing
Number
Characteristics
Type
Min
67
EVNT as input
Asynchronous
1.5
× APBCLK periods
68
EVNT as output
Synchronous to core clock
1 APBCLK period
Notes:
1.
Refer to Table 27 for a definition of the APBCLK period.
2.
Direction of the EVNT signal is configured through the GPIO and Event port registers.
3.
Refer to the MSC711x Reference Manual for details on EVNT pin functionality.
Figure 24. EVNT Pin Timing
Table 30. GPIO Signal Timing1,2,3
Number
Characteristics
Type
Min
601
GPI4.5
Asynchronous
1.5
× APBCLK periods
602
GPO5
Synchronous to core clock
1 APBCLK period
603
Port A edge-sensitive interrupt
Asynchronous
1.5
× APBCLK periods
604
Port A level-sensitive interrupt
Asynchronous
3
× APBCLK periods6
Notes:
1.
Refer to Table 27 for a definition of the APBCLK period.
2.
Direction of the GPIO signal is configured through the GPIO port registers.
3.
Refer to MSC711x Reference Manual for details on GPIO pin functionality.
4.
GPI data is synchronized to the APBCLK internally and the minimum listed is the capability of the hardware to capture data
into a register when the GPA_DR is read. The specification is not tested due to the asynchronous nature of the input and
dependence on the state of the DSP core. It is guaranteed by design.
5.
The input and output signals cannot toggle faster than 50 MHz.
6.
Level-sensitive interrupts should be held low until the system determines (via the service routine) that the interrupt is
acknowledged.
Figure 25. GPI/GPO Pin Timing
EVNT in
67
EVNT out
68
GPI
601
GPO
602
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