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products and documentation, please visit
freescale.com/DSP.
Features and Benefits
FourStarCoreDSPSC3850core
subsystems operating at up to 1 GHz/8000
MMACS per core and up to 32000 MMACS
per device
Multiacceleratorplatformenginefor
baseband (MAPLE-B)
Highly flexible, programmable turbo and
Viterbi decoder supports configurable
decoding parameters. It can perform
up to 200 Mbps of Turbo decoding (six
iterations) or up to 115 Mbps of K = 9
(zero tail) Viterbi decoding
FFT/iFFT for sizes 128, 256, 512, 1024 or
2048 points at up to 350 million samples
per second
DFT/iDFT for sizes up to 1536 points at
up to 175 million samples per second
CRC processing for block sizes up to
128 Kb with throughput up to 9 Gbps at
450 MHz
High-speed,high-bandwidthCLASSfabric
arbitrates between the DSP cores and
other CLASS masters to M2 memory, M3
memory, DDR controllers, MAPLE-B and
the configuration registers
TwoDDRcontrollerswithupto400MHz
clock (800 MHz data) rate and 32/64-
bit DDR2/3 SDRAM data bus. Supports
SODIMMs and up to 0.5 GB per controller
32-channelDMAcontroller
DualRISCcoreQUICCEnginesubsystem
operating at up to 500 MHz provides
parallel packet processing independent of
the DSP cores
Supports:
Two Gigabit Ethernet controllers
supporting RGMII or SGMII
SPI
HSSIthatsupportstwo4xSerDesports,
including:
Two Serial RapidIO controllers supporting
1x/4x operation up to 3.125 Gbaud with
pass-through capability
One PCI Express controller that supports
1x/2x/4x operation
Multiplexing capability for RapidIO, PCI
Express and SGMII signals through the
two SerDes ports
FourTDMinterfaces
UARTandI2C interfaces
Eightsoftwarewatchdogtimers
Sixteen16-bittimers
Two32-bitgeneralpurposetimerspercore
for RTOS support
I/Ointerruptconcentratorandvirtual
interrupt support
Eighthardwaresemaphores
32GPIOportsmultiplexedwithinterface
signals and IRQ inputs
OptionalSEC(MSC8154E)optimizedto
process all the encryption/decryption
algorithms associated with IPSec, IKE,
WTLS/WAP, SSL/TLS, AES, DES,
RC-4, SNOW-3G and Kasumi for
3G-LTE and 3GPP
Bootoptions:Ethernet,SerialRapidIO,I2C
and SPI
ThreeinputclocksandfivePLLs
JTAGTestAccessPort(TAP)andboundary
scan architecture designed to comply with
IEEE 1149.1 standard for profiling and
performance monitoring support
Reducedpowerdissipationwithwait,
stop and power down low-power
standby modes
Optimizedpowermanagementcircuitry
Technology:CMOS45nmSOItechnology
in 29 mm x 29 mm, 783 ball, FC-PBGA
package
Development Support
Freescale supplies a complete set of
CodeWarrior DSP development tools for the
MSC8154 device. The tools provide easier
and more robust ways for designers to
develop optimized DSP systems. Whether the
application targets a 3G-LTE, TD-SCDMA or
WiMAX system, the development environment
gives designers everything they need to
exploit the advanced capabilities of the
MSC8154 architecture.
Support tools include:
Eclipse-basedintegrateddevelopment
environment (IDE)
CandC++compilerwithin-lineassembly
Librarian
Multicoredebugger
Royalty-freeRTOS
Softwaresimulator
Profiler
High-speedruncontrol
Hostplatformsupport
MSC8154ADSdevelopmentboard
MSC8156EVMevaluationmodule
Contact your local sales office or
representative for availability.
Freescale, the Freescale logo, CodeWarrior and StarCore are trademarks of Freescale Semiconductor, Inc. Reg. U.S. Pat. & Tm. Off.
QUICC Engine is a trademark of Freescale Semiconductor, Inc. All other product or service names are the property of their respective
owners. 2010, Freescale Semiconductor, Inc.
Document Number: MSC8154FS
REV 1