參數(shù)資料
型號(hào)： MSC8254SVT1000B
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 數(shù)字信號(hào)處理
英文描述： 0-BIT, OTHER DSP, PBGA783
封裝： 29 X 29 MM, LEAD FREE, PLASTIC, FCBGA-783
文件頁(yè)數(shù)： 58/68頁(yè)
文件大小： 909K
代理商： MSC8254SVT1000B
Hardware Design Considerations
MSC8254 Quad-Core Digital Signal Processor Data Sheet, Rev. 4
Freescale Semiconductor
61
3.5.1.2
DDR Interface Is Used With 32-Bit DDR Memory Only
Table 41 lists unused pin connection when using 32-bit DDR memory. The 32 most significant data lines are not used.
3.5.1.3
ECC Unused Pin Connections
When the error code correction mechanism is not used in any 32- or 64-bit DDR configuration, refer to Table 42 to determine
the correct pin connections.
Table 41. Connectivity of DDR Related Pins When Using 32-bit DDR Memory Only
Signal Name
Pin Connection
MDQ[31–0]
in use
MDQ[63–32]
NC
MDQS[3–0]
in use
MDQS[7–4]
NC
MDQS[3–0]
in use
MDQS[7–4]
NC
MA[15–0]
in use
MCK[2–0]
in use
MCK[2–0]
in use
MCS[1–0]
in use
MDM[3–0]
in use
MDM[7–4]
NC
MBA[2–0]
in use
MCAS
in use
MCKE[1–0]
in use
MODT[1–0]
in use
MMDIC[1–0]
in use
MRAS
in use
MWE
in use
MVREF
in use
GVDD1/GVDD2
in use
Notes:
1.
For the signals listed in this table, the initial M stands for M1 or M2 depending on which DDR controller is not used.
2.
For MSC8254 Revision 1 silicon, these pins were connected to GND (or VDD). For newer revisions of the MSC8254,
connecting these pins to GND increases device power consumption.
Table 42. Connectivity of Unused ECC Mechanism Pins
Signal Name
Pin connection
MECC[7–0]
NC
MDM8
NC
MDQS8
NC
MDQS8
NC
Notes:
1.
For the signals listed in this table, the initial M stands for M1 or M2 depending on which DDR controller is not used.
2.
For MSC8254 Revision 1 silicon, these pins were connected to GND (or VDD). For newer revisions of the MSC8254,
connecting these pins to GND increases device power consumption.
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