參數(shù)資料
型號(hào): MSM13Q
廠商: OKI SEMICONDUCTOR CO., LTD.
英文描述: 0.35 レm Sea of Gates Arrays
中文描述: 0.35蓋茨陣列レ米海
文件頁數(shù): 4/20頁
文件大小: 227K
代理商: MSM13Q
I
MSM13Q0000/14Q0000
I
––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––
2
Oki Semiconductor
ARRAY ARCHITECTURE
The primary components of a 0.35 μm MSM13Q/14Q circuit include:
I/O base cells
Configurable I/O pads for V
DD
, V
SS
, or I/O (optimized 3-V I/O and 3-V I/O that is 5-V tolerant)
V
DD
and V
SS
pads dedicated to wafer probing
Separate power bus for output buffers
Separate power bus for internal core logic and input buffers
Core base modules containing three compute cells for each drive cell
Isolated gate structure for reduced input capacitance and increased routing flexibility
Each array has 24 dedicated corner pads for power and ground use during wafer probing, with 4 pads
per corner. The arrays also have separate power rings for the internal core functions (V
DDC
and V
SSC
)
and output drive transistors (V
DDO
and V
SSO
).
The array architecture uses optimally sized transistors to efficiently implement logic and memory in a
metal programmable technology. CBA uses two types of cells: compute cells and drive cells. The com-
pute cell employs four PMOS and four NMOS trasnsistors whose sizes are optimized for logic and mem-
ory implementations as shown in
Figure 1
. The quantity and size of the transistors in a compute cell are
carefully selected to maximize the efficiency of most commonly used functions in VLSI design. The drive
cell consists of two large PMOS pull-up transistors and two large pull-down transistors. The compute
and drive cells are tiled to create a channelless core array, with three comput cells for each drive cell as
shown in
Figure 2
. The 3:1 ratio of compute to drive cells was selected for optimal implementation of
emerging applications. Macrocells are created using either compute cells, drive cells, or combinations of
compute and drive cells.
MSM13Q/14Q FAMILY LISTING
MSM13Q/14Q
Series
PAD No.
Raw Gate
(Gates)
Usable Gate
M13Q(3LM)
Usable Gate
M14Q(4LM)
Raw Gate
Row
Column
0150
144
157,192
105,319
143,045
196
802
0230
176
242,400
152,712
208,464
240
1,010
0340
208
346,176
204,244
276,941
288
1,202
0530
256
536,400
289,656
391,572
360
1,490
0840
320
847,048
415,054
567,522
452
1,874
1020
352
1,033,000
475,180
650,790
500
2,066
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