參數(shù)資料
型號(hào)： MSM14Q000
廠商： OKI SEMICONDUCTOR CO., LTD.
英文描述： HD VIEW TRANSMITTER 8 PORT
中文描述： 0.35蓋茨陣列レ米海
文件頁(yè)數(shù)： 13/20頁(yè)
文件大?。?/td> 227K
代理商： MSM14Q000
–––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––
I
MSM13Q0000/14Q0000
I
11
Oki Semiconductor
Automatic Test Pattern Generation
Oki’s 0.35 μm ASIC technologies support Automatic Test Pattern Generation (ATPG) using full scan-
path design techniques, including the following:
Increases fault coverage
≥
95%
Uses Synopsys Test Compiler
Inserts scan structures automatically
Connects scan chains
Traces and reports scan chains
Checks for rule violations
Generates complete fault reports
Allows multiple scan chains
Supports vector compaction
ATPG methodology is described in detail in Oki’s
0.35
μ
m Scan Path Application Note
.
Floorplanning Design Flow
Oki offers three floorplanning tools for high-density ASIC design. The two main purposes for Oki’s floor-
planning tool are to:
Ensure conformance of critical circuit performance specifications
Shorten overall design turnaround time (TAT)
The supported floorplanners are: Cadence DP3, Gambit GFP, and Oki’s internal floorplanner.
In a traditional design approach with synthesis tools, timing violations after prelayout simulation are
fixed by manual editing of the netlist. This process is difficult and time consuming. Also, there is no
physical cluster information provided in the synthesis tool, and so it is difficult to synthesize logic using
predicted interconnection delay due to wire length. Therefore, synthesis tools may create over-optimized
results.
To minimize these problems, Synopsys proposed a methodology called Links to Layout (LTL). Based on
this methodology, Oki developed an interface between Oki’s floorplanners and the Synopsys environ-
ment, called Link Synopsys to Floorplanner (LSF). Because not all Synopsys users have access to the Syn-
opsys Floorplan Management tool, Oki developed the LSF system to support both users who can access
Scan Data In
Scan Select
D
C
SD
SS
Q
QN
D
C
SD
SS
A
B
Combinational Logic
FD1AS
FD1AS
Scan Data Out
Q
QN
Figure 6. Full Scan Path Configuration
相關(guān)PDF資料
PDF描述
MSM13Q 0.35 レm Sea of Gates Arrays
MSM27C1602CZ 1,048,576-Word x 16-Bit or 2,097,152-Word x 8-Bit One Time PROM
MSM27C1652CZ 1,048,576-Word x 16-Bit or 2,097,152-Word x 8-Bit 8-Word x 16-Bit or 16-Word x 8-Bit Page Mode One Time PROM
MSM27C1655CZ 524,288-Double Word x 32-Bit or 1,048,576-Word x 16-Bit 4-Double Word x 32-Bit or 8-Word x 16-Bit Page Mode One Time PROM
MSM27C201CZ 262,144-Word x 8-Bit One Time PROM(256K字×8位一次性可編程ROM字)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MSM14Q0000 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:0.35 レm Sea of Gates Arrays
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MSM14Q0230 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:0.35 レm Sea of Gates Arrays
MSM14Q0340 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:0.35 レm Sea of Gates Arrays
MSM14Q0530 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:0.35 レm Sea of Gates Arrays
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