
3
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
BLOCK DIAGRAM
D0
CE
BYTE/V
PP
OE
CE
PGM
OE
A
R
C
Memory Matrix
Multiplexer & Page Data Latch
Output Buffer
FUNCTION TABLE
STAND-BY
OUTPUT DISABLE
READ (8-Bit)
READ (16-Bit)
MODE
D15/A-1
CE
L
L
OE
L
L
V
CC
D
OUT
Hi-Z
L/H
L
H
L
H
L
*
H
*
* : Don't Care
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
X8/X16 Switch
A-1
In 8-bit output mode, these pins are
three-stated and pin D15 functions
as the A-1 address pin.
4.5V
to
5.5V
D8 - D14
D0 - D7
H
L
H
D
OUT
Hi-Z
*
Hi-Z
PROGRAM
PROGRAM INHIBIT
PROGRAM VERIFY
L
H
H
H
H
L
D
IN
Hi-Z
D
OUT
11.5V
6.25V
MSM27C3252CZ
BYTE/V
PP
2,097,152X16-Bit or 4,194,304X8-Bit