- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄378003 > MSM5117405C (OKI SEMICONDUCTOR CO., LTD.) 4M×4 Dynamic RAM(4M×4動態(tài)RAM) PDF資料下載
參數(shù)資料
| 型號： | MSM5117405C |
| 廠商： | OKI SEMICONDUCTOR CO., LTD. |
| 英文描述： | 4M×4 Dynamic RAM(4M×4動態(tài)RAM) |
| 中文描述： | 4米× 4動態(tài)RAM（4米× 4動態(tài)內(nèi)存） |
| 文件頁數(shù)： | 8/18頁 |
| 文件大小： | 676K |
| 代理商： | MSM5117405C |
8/18
Semiconductor
MSM5117405C
Notes:
1. A start-up delay of 200
μ
s is required after power-up, followed by a minimum of eight
initialization cycles (
RAS
-only refresh or
CAS
before
RAS
refresh) before proper device
operation is achieved.
2. The AC characteristics assume t
T
= 2 ns.
3. V
IH
(Min.) and V
IL
(Max.) are reference levels for measuring input timing signals.
Transition times (t
T
) are measured between V
IH
and V
IL
.
4. This parameter is measured with a load circuit equivalent to 2 TTL loads and 100 pF.
5. Operation within the t
RCD
(Max.) limit ensures that t
RAC
(Max.) can be met.
t
RCD
(Max.) is specified as a reference point only. If t
RCD
is greater than the specified
t
RCD
(Max.) limit, then the access time is controlled by t
CAC
.
6. Operation within the t
RAD
(Max.) limit ensures that t
RAC
(Max.) can be met.
t
RAD
(Max.) is specified as a reference point only. If t
RAD
is greater than the specified
t
RAD
(Max.) limit, then the access time is controlled by t
AA
.
7. t
CEZ
(Max.), t
REZ
(Max.), t
WEZ
(Max.) and t
OEZ
(Max.) define the time at which the
output achieves the open circuit condition and are not referenced to output voltage
levels.
8. t
CEZ
and t
REZ
must be satisfied for open circuit condition.
9. t
RCH
or t
RRH
must be satisfied for a read cycle.
10. t
WCS
, t
CWD
, t
RWD
, t
AWD
and t
CPWD
are not restrictive operating parameters. They are
included in the data sheet as electrical characteristics only. If t
WCS
≥
t
WCS
(Min.), then
the cycle is an early write cycle and the data out will remain open circuit (high
impedance) throughout the entire cycle. If t
CWD
≥
t
CWD
(Min.) , t
RWD
≥
t
RWD
(Min.),
t
AWD
≥
t
AWD
(Min.) and t
CPWD
≥
t
CPWD
(Min.), then the cycle is a read modify write
cycle and data out will contain data read from the selected cell; if neither of the above
sets of conditions is satisfied, then the condition of the data out (at access time) is
indeterminate.
11. These parameters are referenced to the
CAS
leading edge in an early write cycle, and
to the
WE
leading edge in an
OE
control write cycle, or a read modify write cycle.
12. The test mode is initiated by performing a
WE
and
CAS
before
RAS
refresh cycle.
This mode is latched and remains in effect until the exit cycle is generated. In a test mode
CA0 and CA1 are not used and each DQ pin now accesses 4-bit locations. Since all 4 DQ
pins are used, a total of 16 data bits can be written in parallel into the memory array.
In a read cycle, if 4 data bits are equal, the DQ pin will indicate a high level. If the 4 data
bits are not equal, the DQ pin will indicate a low level. The test mode is cleared and the
memory device returned to its normal operating state by performing a
RAS
-only
refresh cycle or a
CAS
before
RAS
refresh cycle.
13. In a test mode read cycle, the value of access time parameters is delayed for 5 ns for the
specified value. These parameters should be specified in test mode cycle by adding the
above value to the specified value in this data sheet.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MSM5117405D | 4,194,304-Word x 4-Bit DYNAMIC RAM : FAST PAGE MODE TYPE WITH EDO |
| MSM5117405F | 4,194,304-Word 】 4-Bit DYNAMIC RAM : FAST PAGE MODE TYPE WITH EDO |
| MSM5117800A | 2,197,152-Word x 8-Bit DYNAMIC RAM : FAST PAGE MODE TYPE |
| MSM5117800D-60JS | 2,097,152-Word x 8-Bit DYNAMIC RAM : FAST PAGE MODE TYPE |
| MSM5117800D | 2,097,152-Word x 8-Bit DYNAMIC RAM : FAST PAGE MODE TYPE |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MSM5117405D | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:4,194,304-Word x 4-Bit DYNAMIC RAM : FAST PAGE MODE TYPE WITH EDO |
| MSM5117405F | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:4,194,304-Word 】 4-Bit DYNAMIC RAM : FAST PAGE MODE TYPE WITH EDO |
| MSM5117405F-60J3 | 制造商:ROHM Semiconductor 功能描述: |
| MSM5117405F-60J3-7 | 功能描述:IC DRAM 16MBIT 60NS 26SOJ RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 格式 - 存儲器:閃存 存儲器類型:閃存 - NAND 存儲容量:4G（256M x 16） 速度:- 接口:并聯(lián) 電源電壓:2.7 V ~ 3.6 V 工作溫度:0°C ~ 70°C 封裝/外殼:48-TFSOP（0.724"，18.40mm 寬） 供應(yīng)商設(shè)備封裝:48-TSOP I 包裝:Digi-Reel® 其它名稱:557-1461-6 |
| MSM5117405F-60SJ | 制造商:ROHM Semiconductor 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。