- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄378003 > MSM5118160DSL (OKI SEMICONDUCTOR CO., LTD.) 1,048,576-Word x 16-Bit DYNAMIC RAM : FAST PAGE MODE TYPE PDF資料下載
參數(shù)資料
| 型號(hào)： | MSM5118160DSL |
| 廠商： | OKI SEMICONDUCTOR CO., LTD. |
| 英文描述： | 1,048,576-Word x 16-Bit DYNAMIC RAM : FAST PAGE MODE TYPE |
| 中文描述： | 1,048,576字× 16位動(dòng)態(tài)隨機(jī)存儲(chǔ)器：快速頁面模式型 |
| 文件頁數(shù)： | 8/17頁 |
| 文件大小： | 526K |
| 代理商： | MSM5118160DSL |
8/16
Semiconductor
MSM5118160D/DSL
Notes:
1. A start-up delay of 200
μ
s is required after power-up, followed by a minimum of eight
initialization cycles (
RAS
-only refresh or
CAS
before
RAS
refresh) before proper device
operation is achieved.
2. The AC characteristics assume t
T
= 5 ns.
3. V
IH
(Min.) and V
IL
(Max.) are reference levels for measuring input timing signals.
Transition times (t
T
) are measured between V
IH
and V
IL
.
4. This parameter is measured with a load circuit equivalent to 2 TTL loads and 100 pF.
5. Operation within the t
RCD
(Max.) limit ensures that t
RAC
(Max.) can be met.
t
RCD
(Max.) is specified as a reference point only. If t
RCD
is greater than the specified
t
RCD
(Max.) limit, then the access time is controlled by t
CAC
.
6. Operation within the t
RAD
(Max.) limit ensures that t
RAC
(Max.) can be met.
t
RAD
(Max.) is specified as a reference point only. If t
RAD
is greater than the specified
t
RAD
(Max.) limit, then the access time is controlled by t
AA
.
7. t
OFF
(Max.) and t
OEZ
(Max.) define the time at which the output achieves the open
circuit condition and are not referenced to output voltage levels.
8. t
RCH
or t
RRH
must be satisfied for a read cycle.
9. t
WCS
, t
CWD
, t
RWD
, t
AWD
and t
CPWD
are not restrictive operating parameters. They are
included in the data sheet as electrical characteristics only. If t
WCS
≥
t
WCS
(Min.), then
the cycle is an early write cycle and the data out will remain open circuit (high
impedance) throughout the entire cycle. If t
CWD
≥
t
CWD
(Min.) , t
RWD
≥
t
RWD
(Min.),
t
AWD
≥
t
AWD
(Min.) and t
CPWD
≥
t
CPWD
(Min.), then the cycle is a read modify write
cycle and data out will contain data read from the selected cell; if neither of the above
sets of conditions is satisfied, then the condition of the data out (at access time) is
indeterminate.
10. These parameters are referenced to the
UCAS
and
LCAS
, leading edges in an early
write cycle, and to the
WE
leading edge in an
OE
control write cycle, or a read modify
write cycle.
11. These parameters are determined by the falling edge of either
UCAS
or
LCAS
,
whichever is earlier.
12. These parameters are determined by the rising edge of either
UCAS
or
LCAS
,
whichever is later.
13. t
CWL
should be satisfied by both
UCAS
and
LCAS
.
14. t
CP
is determined by the time both
UCAS
and
LCAS
are high.
15. Only SL version.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MSM5118160F | 1,048,576-Word 】 16-Bit DYNAMIC RAM : FAST PAGE MODE TYPE |
| MSM5118165A | 1,048,576-Word x 16-Bit DYNAMIC RAM : FAST PAGE MODE TYPE WITH EDO |
| MSM5118165B | 1,048,576-Word x 16-Bit DYNAMIC RAM : FAST PAGE MODE TYPE WITH EDO |
| MSM5118165D | 1,048,576-Word x 16-Bit DYNAMIC RAM : FAST PAGE MODE TYPE WITH EDO |
| MSM5118165DSL | 1,048,576-Word x 16-Bit DYNAMIC RAM : FAST PAGE MODE TYPE WITH EDO |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MSM5118160F | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:1,048,576-Word 】 16-Bit DYNAMIC RAM : FAST PAGE MODE TYPE |
| MSM5118160F-60J3-7 | 功能描述:IC DRAM 16MBIT 60NS 42SOJ RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:96 系列:- 格式 - 存儲(chǔ)器:閃存 存儲(chǔ)器類型:FLASH 存儲(chǔ)容量:16M（2M x 8，1M x 16） 速度:70ns 接口:并聯(lián) 電源電壓:2.65 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:48-TFSOP（0.724"，18.40mm 寬） 供應(yīng)商設(shè)備封裝:48-TSOP 包裝:托盤 |
| MSM5118160F-60JS | 制造商:ROHM Semiconductor 功能描述: |
| MSM5118160F-60JSR1 | 制造商:ROHM Semiconductor 功能描述: |
| MSM5118160F60T3K | 制造商:OK International 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。